Search results
Jump to navigation
Jump to search
- * 2x20 pins "Pi2" GPIO Header3 KB (394 words) - 23:43, 8 April 2023
- ** 26 pins GPIO port ** 5V 1A from MicroUSB Port or GPIO port16 KB (2,308 words) - 15:48, 3 September 2023
- ...port, two USB 2.0 host ports, Gigabit Ethernet, a PI-2 GPIO bus, an Euler GPIO bus as well as many other peripheral device interfaces such as UART, SPI, a * 2x20 pins "Pi2" GPIO Header11 KB (1,637 words) - 15:04, 26 September 2023
- ...r/dp/B077XPSKQD female terminal block] wire using breadboard wire into the GPIO block at the following locations in a "null modem" configuration with trans3 KB (509 words) - 10:43, 30 March 2023
- All GPIO pins, including UART, operate at 3.3V. (See VCCIO5 in the schematics.) * 2x20 pins "Pi2" GPIO Header18 KB (2,627 words) - 08:07, 23 October 2023
- ! scope="row" | GPIO | <code>gpio-rockchip</code>21 KB (3,171 words) - 14:48, 8 October 2023
- * 2x20 pins "Pi2" GPIO Header * 2x17 pins "Euler" GPIO Header14 KB (2,141 words) - 06:18, 8 November 2023
- ...modem can wake up the A64 (for incoming calls and text messages). The only GPIO bank that can receive interrupts while the A64 is suspended is Port L (on < ...powering always-on 3v3 from DCDC1, video-related 3v3 from DLDO1, 1v8 from GPIO-LDO1, and 1v0 controlled by PD11.''14 KB (2,411 words) - 15:20, 27 February 2023
- ...e can be a keyboard mouse and monitor or a TTL UART cable connected to the GPIO header. Finally, power on the system.5 KB (780 words) - 21:44, 6 July 2023
- ** use actual level-shifted PWM pins for PWM signal, not just a single GPIO full on/full off ** level-shift the tacho signal to GPIO pins, we can use it in Linux to measure actual RPM7 KB (1,201 words) - 13:40, 21 October 2022
- * 2×20 pins "Pi2" GPIO Header ** The JH7110 SoC supports full multiplexing of its GPIO pins. This means any non-power/ground pin can be configured to any function12 KB (2,038 words) - 08:20, 19 December 2023
- ...DMI, power and audio jack port side, and only tightening the screws on the GPIO side to still make good ground contact. The HDMI and audio jacks should the4 KB (747 words) - 13:17, 5 February 2023
- * GPIO pins exposed for each SOPINE module, including the UARTs To boot use the serial console connect the pins to UART0 on the GPIO header and connect using baud 11520012 KB (1,868 words) - 05:49, 1 November 2023
- * 26 GPIO pins, including SPI, I<sup>2</sup>C and UART functionality, possible I<sup> UART TX is physical pin 1/GPIO 14.20 KB (3,069 words) - 03:43, 19 January 2024
- ...1x USB 3.0 Type-A host, 3x USB 2.0 host, Gigabit Ethernet, SATA (model A), GPIO Bus, MiPi DSI interface, e-ink interface (model A), eDP interface (model A) * 2x20 pins "Pi2" GPIO Header on model B, 2x10 pins GPO header on model A30 KB (4,439 words) - 07:56, 14 November 2023
- * 5V power rails on the 20 pin GPIO header5 KB (685 words) - 22:04, 2 April 2023
- System Serial is located on PI-5 bus (11x2 GPIO header).7 KB (1,040 words) - 08:41, 12 April 2023
- * Changed GPIO assignment so more functionality is available (i.e. NFC and VSYNC)5 KB (760 words) - 00:49, 16 March 2023
- ...ill uses a RISC-V processor, but adds noticeable upgrades to the hardware. GPIO is broken out on USB-C for creating your own projects, same pinout as Pinec ...roduct/pinecil-break-out-board/ Pinecil breakout board] lets you use JTAG, GPIO, A2D, SPI, and more.13 KB (2,013 words) - 20:07, 13 February 2023
- ...tps://doc-en.rvspace.org/JH7110/Datasheet/JH7110_DS/function_0.html JH7110 GPIO AF]16 KB (2,402 words) - 14:22, 13 June 2023