Difference between revisions of "Quartz64"
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== SoC and Memory Specification == | == SoC and Memory Specification == | ||
* Based on [https://www.rock-chips.com/a/en/products/RK18_Series/2019/0529/989.html Rockchip RK1808] | * Based on [https://www.rock-chips.com/a/en/products/RK18_Series/2019/0529/989.html Rockchip RK1808] | ||
[[File: | [[File:RK3566_icon.png|right]] | ||
=== CPU Architecture === | === CPU Architecture === |
Revision as of 07:53, 10 February 2021
The SOEdge is a 3TOPS compute module that can be paired with the SOPine base board or USB 3.0 and PCIe adapters for development. It can connect to a SBC, such as the ROCKPro64 or a regular PC.
Software and OS Image Downloads
SOEdge Software Release
- TBD
SoC and Memory Specification
- Based on Rockchip RK1808
CPU Architecture
- Quad-core ARM Cortex-A55 CPU
- AArch32 for full backward compatibility with Armv7
- ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation
- Include VFP hardware to support single and double-precision operations
- ARMv8 Cryptography Extensions
- Integrated 32KB L1 instruction cache, 32KB L1 data cache
- 512KB unified system L3 cache
- TrustZone technology support
Graphic Process Unit GPU Capability
- Mali-G52 2EE Bifrost GPU@800MHz
- 4x Multi-Sampling Anti-Aliasing (MSAA) with minimal performance drop
- 128KB L2 Cache configurations
- Support OpenGL ES 1.1, 2.0, and 3.2
- Support Vulkan 1.0 and 1.1
- Support OpenCL 2.0 Full Profile
- Support 1600Mpix/s fill rate when 800MHz clock frequency
- Support 38.4GLOPs when 800MHz clock frequency
Neural Process Unit NPU Capability
- Neural network acceleration engine with processing performance up to 0.8 TOPS
- Support integer 8, integer 16 convolution operation
- Support deeplearning frameworks: TensorFlow, TF-lite, Pytorch, Caffe, ONNX, MXNet, Keras, Darknet
System Memory
- RAM Memory Variants: 2GB - 8GB LPDDR4.
- Storage Memory: SPI Flash and optional eMMC module from 16GB up to 128GB
Network
- 10/100/1000Mbps Ethernet
- WiFi 802.11 b/g/n;ac with Bluetooth 5.0 (optional on model A)
Storage
- microSD - bootable, support SDHC and SDXC, storage up to 256GB
- USB - 2 USB 2.0 Host port, 1 USB 3.0 Host port
- native SATA 2.0 Port (only on model A, share with USB 3.0 host port)
Expansion Ports
- eDP - 4 lanes of 2.7Gbps, up to 2560x1600@60Hz (only on model A)
- DSI - Display Serial Interface, 4 lanes MiPi, up to 1440P on model A, 2 lanes MiPi, up to 1080p on model B
- CSI - CMOS Camera Interface, 4 lanes MiPi up to 8 mega pixel on model A, 2 lanes MiPi up to 5 mega pixel on model B
- TP - Touch Panel Port, SPI with interrupt on model A
- RTC - Real Time Clock Battery Connector
- VBAT - Lithium Battery Connector with temperature sensor input on model A
- Wifi/BT Module Header - SDIO 3.0 and UART on model A, build in Wifi/BT Module on model B
- 2x20 pins "Pi2" GPIO Header on model B, 2x5 pins GPO header on
- PCIe 2x open ended slot on model A, m.2 slot on model B
Quartz64 board Information, Schematics, and Certifications
- Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm
- Input Power: DC 12V @ 3A 5.5OD/2.1ID Barrel DC Jack connector
- SOEdge Model "A" Baseboard Schematic and PCB Board Resource:
- Wifi/BT module Schematic for model A
- ROCKPro64 AP6359SA Wifi/BT Schematic
- Certification:
- Not yet available
Datasheets for Components and Peripherals
- Rockchip RK1808 SoC information:
- Rockchip RK809 PMU (Power Management Unit) information:
- DDR4 information:
- eMMC information:
- SPI NOR Flash information:
- SOEdge Related:
- 5MPixel CMOS Camera module information:
- LCD Touch Screen Panel information:
- Ethernet PHY information:
- Wifi/BT module information:
- Enclosure information:
- Connector information:
SOEdge/SOPine Cluster Board Resource
- Cluster board is an hardware open source project and will be available at PINE64 store on late January 2018.
- Please note that this project is not "OSH" compliance.:
- Clusterboard version 2.2 Schematic Capture source file
- Clusterboard version 2.2 Schematic Capture PDF file
- Clusterboard version 2.2 PCB Job source file
- Clusterboard version 2.2 PCB Gerber file
- Clusterboard version 2.2 PCB Layout PDF file
- Clusterboard 20pins header definition
- Clusterboard 3D drawing in Fusion360
- Clusterboard PDF drawing