Difference between revisions of "Quartz64 Development"
m (→Upstreaming Status: Add link to the SPI dt patchset) |
(→Linux Kernel Config Options: Add some more kernel config options of interest, though many are inferred by other options already) |
||
Line 277: | Line 277: | ||
* <code>CONFIG_ROCKCHIP_PM_DOMAINS</code> | * <code>CONFIG_ROCKCHIP_PM_DOMAINS</code> | ||
** Power management domains | ** Power management domains | ||
* <code>CONFIG_GPIO_ROCKCHIP</code> | |||
** GPIO support | |||
* <code>CONFIG_PINCTRL_ROCKCHIP</code> | |||
** GPIO and general SoC support | |||
* <code>CONFIG_PWM_ROCKCHIP</code> | |||
** PWM support | |||
* <code>CONFIG_ROCKCHIP_IOMMU</code> | |||
** IOMMU support | |||
* <code>CONFIG_ROCKCHIP_MBOX</code> | |||
** Mailbox support (for communication with MCU) | |||
* <code>CONFIG_ROCKCHIP_SARADC</code> | |||
** Analog-to-digital conversion support, for e.g. microphones | |||
* <code>CONFIG_ROCKCHIP_THERMAL</code> | |||
** Temperature sensor and thermal throttling support | |||
* <code>CONFIG_SPI_ROCKCHIP</code> | |||
** SPI support | |||
* <code>CONFIG_VIDEO_HANTRO_ROCKCHIP</code> | |||
** Hardware video decoder support | |||
* <code>CONFIG_ROCKCHIP_IODOMAIN</code> | |||
** General SoC support so your I/O pins have the right voltage | |||
* <code>CONFIG_COMMON_CLK_ROCKCHIP</code> | |||
** Common clock support | |||
== Resources == | == Resources == |
Revision as of 14:16, 27 November 2021
This page documents the current status of software support for the Quartz64 single-board computer, and provides links to resources to help prospective contributors get started. Information is kept current on a best-effort basis as various patches get accepted into the kernel.
Overview
Upstreaming Status
Function | Status | Component | Notes | Applies To | |
---|---|---|---|---|---|
Video Output | In review[1] | rockchipdrm/VOP-v2
|
Also needs the DTS changes by mriesch[2] | ||
3D Acceleration | In review[3] | Upstream Mesa | panfrost
|
GPU is basically already supported in mainline but needs some device tree changes for this particular SoC | |
Video Decode | Linux Staging | Not in ffmpeg[4] | hantro-vpu , using v4l2-requests
|
Necessary device tree changes in review | |
Audio | Linux Mainline | rockchip-i2s-tdm
|
As of 5.16[5] | ||
Linux Mainline | rockchip-spdif
|
As of 5.15[6] | |||
Linux Mainline | rk817-codec
|
As of 5.14[7]. | Quartz64 Model A/B | ||
u-boot | Waiting on ATF sources | ||||
Device Tree | Linux Mainline | Quartz64 Model A | As of 5.16[8] | Quartz64 Model A | |
Needs submitting | Quartz64 Model B | Quartz64 Model B | |||
Needs submitting | SOQuartz | SOQuartz | |||
Needs submitting | PineNote | User:smaeul wrote a device tree using mainline bindings here. | |||
Gigabit Ethernet | Linux Mainline | rk3566-gmac
|
As of 5.14[9] | ||
Linux Mainline | yt8511-phy
|
As of 5.14[10] | |||
IOMMU | Linux Mainline | rockchip-iommu
|
As of 5.14[11] | ||
GPIO | Linux Mainline | gpio-rockchip
|
As of 5.15[12] | ||
pinctrl | Linux Mainline | ||||
Thermal Regulation | Linux Mainline | rockchip-thermal
|
As of 5.14[13] | ||
PCIe | Linux Mainline | pcie-dw-rockchip
|
As of 5.15[14] | ||
Power Management | Linux Mainline | rockchip-pm-domains
|
As of 5.14[15] | ||
Voltage Control | Linux Mainline | rk3568-pmu-io-voltage-domain
|
As of 5.15[16] | ||
SPI | Linux Mainline | spi-rockchip
|
As of 5.14[17]. Necessary device tree changes in review. | ||
Battery | In review[18] | rk817-charger
|
In the BSP tree this is handled by rk817_battery.c and rk817_charger.c. | Quartz64 Model A | |
Microphone | Linux Mainline | rockchip-saradc
|
As of 5.15[19]. Headphone jack mic seems to connect to SARADC_VIN2_HP_HOOK , so I'm pretty sure that the dtsi and driver changes are needed for that mic to work
| ||
USB 2.0 | In review[20] | rockchip-usb2phy
|
|||
e-Ink | Needs reversing | ebc-dev ?
|
See RK3566 EBC Reverse-Engineering | ||
Combo PHY | In review[21] | naneng-combphy
|
|||
RGA | Needs fixing | rockchip-rga
|
User:CounterPillow experimentally enabled it[22] in the device tree and ran gstreamer's v4l2convert through it to test, resulting in a completely garbled output. | ||
Fan Controller | Needs porting | emc2301
|
Previous attempts at mainlining: [23] and [24]. Latest iteration: [25] | SOQuartz Blade | |
CIF (CSI Camera) | Needs porting | video_rkcif
|
Downstream: [26] |
Current Status
The following sections give an overview over the current status of different parts of the board. Some parts are waiting on a driver to be written or ported, others only need various adjustments.
According to pgwipeout, I/O device performance is within expected ranges now.
Working
- eMMC
- SDMMC0 (SD cards)
- GMAC (Gigabit Ethernet)
- USB 2.0
- SATA 2
- SATA 3
- UART
- UART 0 (Pi-bus)
- UART 1 (Bluetooth)
- UART 2 (Pi-bus, debug)
- Video Decode
- VP8
- Battery
- GPU
- Audio
- Analog audio works
- SPDIF works
- HDMI works
- SPI
Partially Working
- PCI-Express Controller — everything but devices that need cache coherency (e.g. dGPUs) should work
- User:CounterPillow noticed some weirdness with NVMe devices disconnecting during heavy write operations, likely down due to power draw on one of the rails as the same sustained bandwidth could be achieved with a different PCIe device with no issue.
- SDMMC1 (Wi-Fi) — AP6256 working, BL602 needs some work to make it flash firmware
- I2C — works but is not yet exposed to the Pi-bus
- GIC — needs errata published by Rockchip to get upstream to add device-specific workarounds[27]
- Video Output — only at 1920x1080p60 and nothing else, very buggy and rough around more than just the edges
Confirmed Broken
- USB 3.0 — only works with very short cables and depends on the device. This is due to a hardware design issue relating to the coupling capacitors needed for SATA, which shares the same lines as USB 3.0.
- Hardware design changes have been suggested to engineers, it's in their hands now.
- Module autoloading for the Ethernet PHY. The Motorcomm PHY does not have a vendor ID written into the appropriate hardware block, so there is no canonical way to identify the device.
Needs Testing
- E-Paper — needs EBC driver
- Microphone Input
- CSI — needs CIF driver
TODO
ebc-dev Reverse Engineering and Development
The driver for the eInk panel needs to both be reverse engineered and then rewritten as C. In its current form, it is mostly an assembly dump produced by gcc with debug symbols. See RK3566 EBC Reverse-Engineering for details.
Investigate MCU
The RK3566 comes with an integrated RISC-V microcontroller (MCU). It communicates with the A55 host through the Mailbox system driven by the rockchip-mailbox driver. Since this MCU would be quite useful for things such as low power standby mode, investigating how it can be turned on and have firmware flashed to it should greatly enhance the power saving features of the PineNote.
Mainline U-Boot Work
Currently, mainline U-Boot does not have support for the RK3566 SoC used on the Quartz64. That's why we currently use the "downstream" Rockchip U-Boot, which is based on an old version of U-Boot and contains vendor specific patches that have not undergone the same level of code review as they'd have done had they been submitted upstream.
While the lack of ATF sources mean that using mainline U-Boot would still require the use of Rockchip provided binaries for the firmware, the mainline U-Boot works needs to be done eventually anyway, and even with Rockchip blobs, a more modern version of U-Boot will be much nicer to use.
Someone needs to get on the task of investigating what minimally needs to be ported to get the board booting with mainline U-Boot, port those changes, and submit them for review.
List of Useful Resources for this Task
- Downstream Rockchip U-Boot repository with Quartz64 specific patches: https://gitlab.com/pgwipeout/u-boot-rockchip/-/tree/quartz64
- Mainline Rockchip custodian U-Boot repository: https://source.denx.de/u-boot/custodians/u-boot-rockchip
- U-Boot Mailing List: https://lists.denx.de/listinfo/u-boot
Linux Kernel Config Options
CONFIG_SND_SOC_ROCKCHIP_I2S_TDM
- for Analog and (in the future) HDMI audio
CONFIG_SND_SOC_RK817
- for Analog audio on the Model A
CONFIG_STMMAC_ETH
- Ethernet
CONFIG_DWMAC_ROCKCHIP
- Ethernet
CONFIG_MOTORCOMM_PHY
- Ethernet, set this one to Y, m won't work as module autoloading does not work for this specific PHY (the vendor ID is zeroed out)
CONFIG_MMC_DW
- MMC/SD
CONFIG_MMC_DW_ROCKCHIP
- MMC/SD
CONFIG_PCIE_ROCKCHIP_DW_HOST
- PCIe
CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY
- PHY for PCIe/SATA/USB3, not yet upstream
CONFIG_DRM_PANFROST
- GPU
CONFIG_SND_SOC_ROCKCHIP_SPDIF
- SPDIF audio
CONFIG_ROCKCHIP_DW_HDMI
- HDMI PHY
CONFIG_ROCKCHIP_VOP2
- Video output, not yet upstream
CONFIG_ARCH_ROCKCHIP
- General SoC support
CONFIG_ROCKCHIP_PHY
- General SoC support
CONFIG_PHY_ROCKCHIP_INNO_USB2
- USB 2
CONFIG_RTC_DRV_RK808
- Real-time Clock
CONFIG_COMMON_CLK_RK808
- Real-time Clock
CONFIG_MFD_RK808
- Various things relating to the RK817 chip
CONFIG_REGULATOR_RK808
- Voltage regulators
CONFIG_ROCKCHIP_PM_DOMAINS
- Power management domains
CONFIG_GPIO_ROCKCHIP
- GPIO support
CONFIG_PINCTRL_ROCKCHIP
- GPIO and general SoC support
CONFIG_PWM_ROCKCHIP
- PWM support
CONFIG_ROCKCHIP_IOMMU
- IOMMU support
CONFIG_ROCKCHIP_MBOX
- Mailbox support (for communication with MCU)
CONFIG_ROCKCHIP_SARADC
- Analog-to-digital conversion support, for e.g. microphones
CONFIG_ROCKCHIP_THERMAL
- Temperature sensor and thermal throttling support
CONFIG_SPI_ROCKCHIP
- SPI support
CONFIG_VIDEO_HANTRO_ROCKCHIP
- Hardware video decoder support
CONFIG_ROCKCHIP_IODOMAIN
- General SoC support so your I/O pins have the right voltage
CONFIG_COMMON_CLK_ROCKCHIP
- Common clock support
Resources
Repositories
- pgwipeout's kernel tree
- BSP based development effort for SPL/U-Boot and Linux
- Image CI pipeline aimed at developers
- Rockchip U-Boot
- Downstream rockchip-linux kernel tree
Other
- Rockchip-SoC Patchwork Page
- Rockchip Kernel Mailing List Archive
Board/SoC Documentation
Booting
Boot Order
The RK3566 boot ROM will search for a valid ID BLOCK in the following order on the support boot media:
- SPI NOR flash
- SPI NAND flash
- SD-Card
- eMMC
... if this fails, the boot ROM will initialize the USB0 port and wait for a connection from the Rockchip flash/boot tools.
Bootloader Flashing
As per pgwipeout's commit message:
- Make a partition named
uboot
as partition number 1 at 8 MiB to 16 MiB dd if=idblock.bin of=/dev/<mmc/sd> seek=64
dd if=uboot.img of=/dev/<mmc/sd>1