Difference between revisions of "SOQuartz"

Jump to navigation Jump to search
604 bytes added ,  17:10, 4 November 2021
no edit summary
(10 intermediate revisions by the same user not shown)
Line 19: Line 19:
* Integrated 32KB L1 instruction cache and 32KB L1 data cache per core
* Integrated 32KB L1 instruction cache and 32KB L1 data cache per core
* 512KB unified system L3 cache
* 512KB unified system L3 cache


=== GPU (Graphics Processing Unit) Capabilities ===
=== GPU (Graphics Processing Unit) Capabilities ===
Line 35: Line 34:
* Supports integer 8 and integer 16 convolution operations
* Supports integer 8 and integer 16 convolution operations
* Supports the following deep learning frameworks: TensorFlow, TF-lite, Pytorch, Caffe, ONNX, MXNet, Keras, Darknet
* Supports the following deep learning frameworks: TensorFlow, TF-lite, Pytorch, Caffe, ONNX, MXNet, Keras, Darknet


=== System Memory ===
=== System Memory ===
Line 44: Line 42:
* 10/100/1000Mbps Ethernet
* 10/100/1000Mbps Ethernet
* WiFi 802.11 b/g/n/ac with Bluetooth 5.0  
* WiFi 802.11 b/g/n/ac with Bluetooth 5.0  
==  Connector Pins Definition ==
** [https://files.pine64.org/doc/quartz64/SOQuartz%20Connector%20Pin%20Assignments%20ver%201.0.ods SOQuartz Module Connector Pins Definition ver 1.0]




Line 53: Line 55:


=== Storage ===
=== Storage ===
* microSD - bootable, support SDHC and SDXC, storage up to 256GB
* microSD - bootable, support SDHC and SDXC, storage up to 2TB
* USB - 2 USB2.0 Host port
* USB - 2 USB2.0 Host port


Line 65: Line 67:


* SOQuartz Module Schematic:
* SOQuartz Module Schematic:
** [https://files.pine64.org/doc/SOEdge/SOEdge-Schematic-v2.0-190919.pdf SOEdge Module ver 2.0 20190919 Schematic]
** [https://files.pine64.org/doc/quartz64/SOQuartz_SOM_schematic_v1.1_20210816.pdf SOQuartz Module ver 1.1 20210816 Schematic]
** [https://files.pine64.org/doc/SOEdge/SoEdge-PCB-placement-v2.0-topplace.pdf SOEdge Module ver 2.0 20190919 PCB Component Placement Top PDF file]
** [https://files.pine64.org/doc/quartz64/SoQuartz-PCB-placement-v1.1.pdf SOQuartz Module ver 1.1 20210816 PCB Component Placement]
** [https://files.pine64.org/doc/SOEdge/SoEdge-PCB-placement-v2.0-bottomplace.pdf SOEdge Module ver 2.0 20190919 PCB Component Placement Bottom PDF file]
 
* SOQuartz Model "A" Baseboard Schematic and PCB Board Resource:
* SOQuartz Model "A" Baseboard Schematic and PCB Board Resource:
[[File:SOQuartz_model-A_baseboard.jpg |400px|thumb|SOQuartz Model-A Baseboard]]
* SOQuartz Blade Baseboard Schematic and PCB Board Resource:
* SOQuartz Blade Baseboard Schematic and PCB Board Resource:


== Datasheets for Components and Peripherals ==
== Datasheets for Components and Peripherals ==
Line 90: Line 93:
* WiFi/BT module info:
* WiFi/BT module info:
** [https://files.pine64.org/doc/datasheet/rockpro64/AW-CM256SM_DS_DF_V1.9_STD.pdf Azurewave CM256SM 11AC WiFi + Bluetooth5.0 Datasheet]]
** [https://files.pine64.org/doc/datasheet/rockpro64/AW-CM256SM_DS_DF_V1.9_STD.pdf Azurewave CM256SM 11AC WiFi + Bluetooth5.0 Datasheet]]
== SOQuartz Module with various CM4 carrier boards ==
** For CM4 carrier board comprehensive list, please visit [https://pipci.jeffgeerling.com/boards_cm Jeff Geerling collection]
[[File:SOQuartz_with_DF_Robot_carrier_board.jpg|400px|thumb|SOQuartz with DF Robot CM4 Carrier Board]]
[[File:SOQuartz_with_Waveshare_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 Carrier Board]]
[[File:SOQuartz_with_Waveshare_PoE_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 PoE Board]]




Navigation menu