Difference between revisions of "SOEDGE"

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== Software and OS Image Downloads ==
[[File:SOEdge.png|400px|thumb|right|The SOEdge]]
=== SOEdge Software Release ===


The SOEdge software releases can be found in the article [[SOEdge Software Release]].
The '''SOEdge''' is a 3TOPS compute module that can be paired with the SOPine base board or USB 3.0 and PCIe adapters for development. It can connect to a SBC, such as the ROCKPro64 or a regular PC.  


== Accessories Step-by-Step Guides ==
== Software releases ==
Under [[Accessories_Step_by_Step_Guides|'Guides for model A baseboard accessories']] you can find instructions and guides concerning:
 
* Enclosures
The SOEdge software releases can be found in the article [[SOEdge Software Releases]].
* Bluetooth and WiFi module
* Real Time Clock (RTC) battery
* Real Time Clock (RTC) battery holder
* First and third party cases
* Featured 3D printed cases (and more)


== SoC and Memory Specification ==
== SoC and Memory Specification ==
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* Hardware virtualization support
* Hardware virtualization support
* 128KB L2 cache
* 128KB L2 cache


=== Neural Process Unit NPU Capability ===
=== Neural Process Unit NPU Capability ===
* [https://www.verisilicon.com/en/IPPortfolio/VivanteNPUIP NPU IP from Verisilicon Vivantee]
* [https://www.verisilicon.com/en/IPPortfolio/VivanteNPUIP NPU IP from Verisilicon Vivante]
* Support max 1920 Int8 MAC operation per cycle
* Support max 1920 Int8 MAC operation per cycle
* Support max192 Int16 MAC operation per cycle
* Support max192 Int16 MAC operation per cycle
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[[File:Vivante_Acuity_SDK.jpg]]
[[File:Vivante_Acuity_SDK.jpg]]


=== System Memory ===
=== System Memory ===
* RAM Memory Variants: 2GB DDR4.
* RAM Memory Variants: 2GB DDR4.
* Storage Memory: SPI Flash and optional eMMC module from 16GB up to 128GB
* Storage Memory: 128Mb SPI Flash and optional eMMC module from 16GB up to 128GB


== SOEdge Baseboard Features ==
== SOEdge Baseboard Features ==


=== Network ===
=== Network ===
* 10/100/1000Mbps Etherne
* 10/100/1000Mbps Ethernet
* WiFi 802.11 b/g/n with Bluetooth 4.0 (optional)
* WiFi 802.11 b/g/n with Bluetooth 4.0 (optional)


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=== Expansion Ports ===
=== Expansion Ports ===
* DSI - Display Serial Interface, 4 lanes MiPi, up to 1080P
* DSI - Display Serial Interface, 4 lanes MiPi, up to 1080P
* CSI - CMOS Camera Interface up to 5 mega pixel
* TP - Touch Panel Port, SPI with interrupt
* TP - Touch Panel Port, SPI with interrupt
* RTC - Real Time Clock Battery Connector
* RTC - Real Time Clock Battery Connector
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** [https://files.pine64.org/doc/SOEdge/SOEdge%20Pin%20Assignments%20ver%201.00.ods SOEdge Module Pin Assignment ver 1.0 in Open Document format(includes comparison chart to SOPine)]
** [https://files.pine64.org/doc/SOEdge/SOEdge%20Pin%20Assignments%20ver%201.00.ods SOEdge Module Pin Assignment ver 1.0 in Open Document format(includes comparison chart to SOPine)]
* SOEdge Model "A" Baseboard Schematic and PCB Board Resource:
* SOEdge Model "A" Baseboard Schematic and PCB Board Resource:
** [https://files.pine64.org/doc/SOEdge/SoEdge_Baseboard%20Schematic%20Model%20A-20200513.pdf SOEdge Model "A" Baseboard Schematic 20200513 PDF file]
** [https://files.pine64.org/doc/SOEdge/SOEDGE_MODEL_A_BASEBOARD_Schematic-20210223.pdf SOEdge Model "A" Baseboard Schematic 20210223 PDF file]
** [https://files.pine64.org/doc/SOEdge/SoEdge_Baseboard_PCB_layout_Model_A2020-05-31.pdf SOEdge Model "A" Baseboard PCB Layout PDF file]
** [https://files.pine64.org/doc/SOEdge/SOEDGE_MODEL_A_BASEBOARD_PCB-TOP-20210223.pdf SOEdge Model "A" Baseboard 20210223 PCB Component Placement Top PDF file]
** [https://files.pine64.org/doc/SOEdge/SOEDGE_MODEL_A_BASEBOARD_PCB-BOT-20210223.pdf SOEdge Model "A" Baseboard 20210223 PCB Component Placement Bottom PDF file]
* SOEdge Neural AI Stick Schematic:
* SOEdge Neural AI Stick Schematic:
** [https://files.pine64.org/doc/SOEdge/SOEdge%20Neural%20AI%20Stick%20Schematic_V10.pdf SOEdge Neural AI Stick PDF file]
** [https://files.pine64.org/doc/SOEdge/SOEdge%20Neural%20AI%20Stick%20Schematic_V10.pdf SOEdge Neural AI Stick PDF file]
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== Datasheets for Components and Peripherals ==
== Datasheets for Components and Peripherals ==
* Rockchip RK1808 SoC information:
* Rockchip RK1808 SoC information:
** [https://opensource.rock-chips.com/images/4/43/Rockchip_RK1808_Datasheet_V1.2_20190527.pdf Rockchip RK1808 ver 1.2 datasheet]
** [http://opensource.rock-chips.com/images/4/43/Rockchip_RK1808_Datasheet_V1.2_20190527.pdf Rockchip RK1808 ver 1.2 datasheet]
** [https://files.pine64.org/doc/datasheet/SOEdge/Rockchip%20RK1808%20TRM%20Part1%20V1.2--20190826%20open%20source.pdf Rockchip TK1808 Technical Reference Manual Part 1]
** [https://files.pine64.org/doc/datasheet/SOEdge/Rockchip%20RK1808%20TRM%20Part1%20V1.2--20190826%20open%20source.pdf Rockchip TK1808 Technical Reference Manual Part 1]
* Rockchip RK809 PMU (Power Management Unit) information:
* Rockchip RK809 PMU (Power Management Unit) information:
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** [https://files.pine64.org/doc/datasheet/pine64/GD25Q128C-Rev2.5.pdf GigaDevice 128Mb SPI Flash Datasheet]
** [https://files.pine64.org/doc/datasheet/pine64/GD25Q128C-Rev2.5.pdf GigaDevice 128Mb SPI Flash Datasheet]
* '''SOEdge Related:'''
* '''SOEdge Related:'''
** 5MPixel CMOS Camera module information:
*** [https://files.pine64.org/doc/datasheet/pine64/YL-PINE64-4EC.pdf PINE64 YL-PINE64-4EC 5M Pixel CMOS Image Sensor Module (Description in Chinese)]
*** [https://files.pine64.org/doc/datasheet/pine64/S5K4EC%205M%208%205X8%205%20PLCC%20%20Data%20Sheet_V1.0.pdf S5K4EC 5MP CMOS Image Sensor SoC Module Datasheet]
*** [https://files.pine64.org/doc/datasheet/pine64/S5K4ECGX_EVT1_DataSheet_R005_20100816.pdf S5K4EC 5MP CMOS Image Sensor SoC Chip Datasheet]
*** [https://files.pine64.org/doc/datasheet/pine64/s5k4ec.c S5K4EC 5MP CMOS Image Sensor Driver Source Code in C language]
** LCD Touch Screen Panel information:
** LCD Touch Screen Panel information:
*** [https://files.pine64.org/doc/datasheet/pine64/FY07024DI26A30-D_feiyang_LCD_panel.pdf 7.0" 1200x600 TFT-LCD Panel Specification]
*** [https://files.pine64.org/doc/datasheet/pine64/FY07024DI26A30-D_feiyang_LCD_panel.pdf 7.0" 1200x600 TFT-LCD Panel Specification]
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== SOEdge/SOPine Cluster Board Resource ==
== SOEdge/SOPine Cluster Board Resource ==
* Cluster board is an hardware open source project and will be available at PINE64 store on late January 2018.  
* Cluster board is an hardware open source project and is available at the PINE64 store since late January 2018. It allows 7 SOPine or SOEdge devices to be installed simultaneously.
* Please note that this project is not "OSH" compliance.:
* Please note that this project is not "OSH" compliant
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2.DSN Clusterboard version 2.2 Schematic Capture source file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2.DSN Clusterboard version 2.2 Schematic Capture source file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2_Schematic.pdf Clusterboard version 2.2 Schematic Capture PDF file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2_Schematic.pdf Clusterboard version 2.2 Schematic Capture PDF file]
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** [https://myhub.autodesk360.com/ue2b2f72e/g/shares/SH56a43QTfd62c1cd968cd6bc203ac753401?viewState=NoIgbgDAdAjCA0ICGBmARgEwGZIOwGMBaDFADgFNCAWfAJi2o1IFZDmlTSIA2DW8-FTQgAukA Clusterboard PDF drawing]
** [https://myhub.autodesk360.com/ue2b2f72e/g/shares/SH56a43QTfd62c1cd968cd6bc203ac753401?viewState=NoIgbgDAdAjCA0ICGBmARgEwGZIOwGMBaDFADgFNCAWfAJi2o1IFZDmlTSIA2DW8-FTQgAukA Clusterboard PDF drawing]


== Other Resources ==
= Debugging =
 
== Serial Console ==
 
System Serial is located on PI-5 bus (11x2 GPIO header).
* TXD: Pin 6 (Yellow cable) (Connect to RXD on Serial adapter)
* RXD: Pin 8 (Orange cable) (Connect to TXD on Serial adapter)
* GND: Pin 10 (Black cable) (Connect to GND on Serial adapter)
 
[[File:Soedge_serial_pins.jpg]]
 
The default baudrate is 1500000, note that not all serial adapters support this high baudrate.
 
= Linux Image Releases =
 
== Stock BSP ==
 
=== BSP Linux ver 1.1 Build from SDK ===
* Please unzip first and then using Rockchip tool to flash in
* [https://wiki.pine64.org/index.php/NOOB#Flashing_to_eMMC_using_Rockchip_Tools_.28Rock64_Only.29 Guide to flashing eMMC using Rockchip Tools]
** [http://files.pine64.org/os/SOEdge/stock/SOEdge_linux_v1.1.img.gz download from pine64.org]
** MD5 (TAR-GZip file): a6629f997ae2cae7d9d5324c4e942deda9
** File Size: 119MB
 
=== BSP Linux ver 1.1 Build as USB Stick application from SDK ===
* Please unzip first and then using Rockchip tool to flash in
* [https://wiki.pine64.org/index.php/NOOB#Flashing_to_eMMC_using_Rockchip_Tools_.28Rock64_Only.29 Guide to flashing eMMC using Rockchip Tools]
** [http://files.pine64.org/os/SOEdge/stock/SOEdge_linux_usb_compute_stick.img.gz download from pine64.org]
** MD5 (GZip file): af6ac45995f7ddd9343a7052efffaf30
** File Size: 47MB
 
== Factory Test Build ==
 
* Factory Test Build by Gamiee
* DD image (for 8GB microSD card or eMMC Module and above)
** [http://files.pine64.org/os/SOEdge/gamiee/update-soedge-factory-test-2021-03-23.img.gz download from pine64.org]
** MD5 (GZip file): b3d09933734eaaebb34c357b73f5c69e
** File Size: 119MB
 
= Linux BSP SDK =
 
== Linux BSP Kernel ver 1.1.7 ==
* [http://files.pine64.org/SDK/SOEdge/rk1808_v1.1.7.tar.gz Direct Download from pine64.org]
** MD5 (TAR-GZip file): 47a81a990a644539f3a0e84034654f78
** File Size: 17.42GB
 
== Linux BSP Kernel ver 1.1 ==
* [http://files.pine64.org/SDK/SOEdge/SOEdge_RK-BSP_SDK_v1.1.tar.gz Direct Download from pine64.org]
** MD5 (TAR-GZip file): a66c92e52824762d7c0a63400d6342ea
** File Size: 13.55GB


== Linux BSP Kernel ver 1.1 as USB Stick application ==
* [http://files.pine64.org/SDK/SOEdge/SOEdge_RK-BSP_USB_Dongle_SDK_v1.1.tar.gz Direct Download from pine64.org]
** MD5 (TAR-GZip file): 46f12441e8c35c06184681f355c89651
** File Size: 9.65GB


== Other Resources ==


[[Category:SOEdge]] [[Category:SOPine Clusterboard]] [[Category:SOEdge Baseboard]] [[Category:Rockchip RK1808]]
[[Category:SOPine]] [[Category:Rockchip RK1808]]

Revision as of 08:35, 29 September 2022

The SOEdge

The SOEdge is a 3TOPS compute module that can be paired with the SOPine base board or USB 3.0 and PCIe adapters for development. It can connect to a SBC, such as the ROCKPro64 or a regular PC.

Software releases

The SOEdge software releases can be found in the article SOEdge Software Releases.

SoC and Memory Specification

RK1808 icon.png

CPU Architecture

  • Dual-core ARM Cortex-A35 Processor@1600-2000Mhz
  • A power-efficient ARM 64-Bit Armv8-A architecture
  • AArch32 for full backward compatibility with Armv7
  • Support NEON Advanced SIMD (Single Instruction Multiple Data) instruction for acceleration of media and signal processing function
  • Support Large Physical Address Extensions(LPAE)
  • VFPv4 Floating Point Unit
  • 32KB L1 Instruction cache and 32KB L1 Data cache
  • AArch64 for 64-bit support and new architectural features
  • TrustZone security technology
  • Neon Advanced SIMD
  • DSP and SIMD extensions
  • VFPv4 Floating point
  • Hardware virtualization support
  • 128KB L2 cache

Neural Process Unit NPU Capability

Vivante Acuity SDK.jpg

System Memory

  • RAM Memory Variants: 2GB DDR4.
  • Storage Memory: 128Mb SPI Flash and optional eMMC module from 16GB up to 128GB

SOEdge Baseboard Features

Network

  • 10/100/1000Mbps Ethernet
  • WiFi 802.11 b/g/n with Bluetooth 4.0 (optional)

Storage

  • microSD - bootable, support SDHC and SDXC, storage up to 256GB
  • USB - 2 USB2.0 Host port

Expansion Ports

  • DSI - Display Serial Interface, 4 lanes MiPi, up to 1080P
  • TP - Touch Panel Port, SPI with interrupt
  • RTC - Real Time Clock Battery Connector
  • VBAT - Lithium Battery Connector with temperature sensor input
  • Wifi/BT Module Header - SDIO 3.0 and UART
  • 2x20 pins "Pi2" GPIO Header
  • PCIe 2x open ended slot

SOEdge Module and Baseboard Information, Schematics, and Certifications

  • Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm
  • Input Power: DC 12V @ 3A 5.5OD/2.1ID Barrel DC Jack connector

Datasheets for Components and Peripherals

SOEdge/SOPine Cluster Board Resource

Debugging

Serial Console

System Serial is located on PI-5 bus (11x2 GPIO header).

  • TXD: Pin 6 (Yellow cable) (Connect to RXD on Serial adapter)
  • RXD: Pin 8 (Orange cable) (Connect to TXD on Serial adapter)
  • GND: Pin 10 (Black cable) (Connect to GND on Serial adapter)

Soedge serial pins.jpg

The default baudrate is 1500000, note that not all serial adapters support this high baudrate.

Linux Image Releases

Stock BSP

BSP Linux ver 1.1 Build from SDK

BSP Linux ver 1.1 Build as USB Stick application from SDK

Factory Test Build

  • Factory Test Build by Gamiee
  • DD image (for 8GB microSD card or eMMC Module and above)

Linux BSP SDK

Linux BSP Kernel ver 1.1.7

Linux BSP Kernel ver 1.1

Linux BSP Kernel ver 1.1 as USB Stick application

Other Resources