Difference between revisions of "SOEDGE"

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The SOEdge is a 3TOPS compute module that can be paired with the SOPine base board or USB 3.0 and PCIe adapters for development. It can connect to a SBC, such as the ROCKPro64 or a regular PC.
== Software and OS Image Downloads ==
== Software and OS Image Downloads ==
=== [[SOEdge_Software_Release]] ===
=== SOEdge Software Release ===


[{{fullurl:SOPINE_Software_Release#Armbian}} http://files.pine64.org/sw/pine64_installer/json/penguin.png] [[SOPINE_Software_Release#Armbian|'''Armbian''']]
The SOEdge software releases can be found in the article [[SOEdge Software Release]].


 
== Accessories Step-by-Step Guides ==
== [[Accessories_Step_by_Step_Guides|Accessories Step-by-Step Guides]] ==
Under [[Accessories_Step_by_Step_Guides|'Guides for model A baseboard accessories']] you can find instructions and guides concerning:
Under [[Accessories_Step_by_Step_Guides|'Guides for PINE64 model A accessories']] you can find instructions and guides concerning:
* Enclosures
* Enclosures
* Bluetooth and WiFi module
* Bluetooth and WiFi module
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== SoC and Memory Specification ==
== SoC and Memory Specification ==
* Based on Rockchip RK1808
* Based on [https://www.rock-chips.com/a/en/products/RK18_Series/2019/0529/989.html Rockchip RK1808]
[[File:Allwinner_A64.jpg|right]]
[[File:RK1808_icon.png|right]]


=== CPU Architecture ===
=== CPU Architecture ===
* [http://www.arm.com/products/processors/cortex-a/cortex-a53-processor.php Quad-core ARM Cortex-A53 Processor@1152Mhz]
* [https://developer.arm.com/ip-products/processors/cortex-a/cortex-a35 Dual-core ARM Cortex-A35 Processor@1600-2000Mhz]
* A power-efficient ARM v8 architecture
* A power-efficient ARM 64-Bit Armv8-A architecture
* 64 and 32bit execution states for scalable high performance
* AArch32 for full backward compatibility with Armv7
* Support NEON Advanced SIMD (Single Instruction Multiple Data) instruction for acceleration of media and signal processing function
* Support NEON Advanced SIMD (Single Instruction Multiple Data) instruction for acceleration of media and signal processing function
* Support Large Physical Address Extensions(LPAE)
* Support Large Physical Address Extensions(LPAE)
* VFPv4 Floating Point Unit
* VFPv4 Floating Point Unit
* 32KB L1 Instruction cache and 32KB L1 Data cache
* 32KB L1 Instruction cache and 32KB L1 Data cache
* 512KB L2 cache
* AArch64 for 64-bit support and new architectural features
* TrustZone security technology
* Neon Advanced SIMD
* DSP and SIMD extensions
* VFPv4 Floating point
* Hardware virtualization support
* 128KB L2 cache
 
 
=== Neural Process Unit NPU Capability ===
* [https://www.verisilicon.com/en/IPPortfolio/VivanteNPUIP NPU IP from Verisilicon Vivante]
* Support max 1920 Int8 MAC operation per cycle
* Support max192 Int16 MAC operation per cycle
* Support max 64 FP16 MAC operation per cycle
* 512KB internal buffer
* One isolated voltage domain to support DVFS
* [https://github.com/VeriSilicon/acuity-models Acuity models Github]


[[File:Vivante_Acuity_SDK.jpg]]


=== System Memory ===
=== System Memory ===
* RAM Memory Variants: 2GB DDR4.
* RAM Memory Variants: 2GB DDR4.
* Storage Memory: SPI Flash and optional eMMC module from 16GB up to 128GB
* Storage Memory: 128Mb SPI Flash and optional eMMC module from 16GB up to 128GB


== SOPine Baseboard Features ==
== SOEdge Baseboard Features ==
 
=== Video ===
* Digital Video (Type A - full)
 
=== Audio ===
* 3.5mm stereo earphone/microphone plug


=== Network ===
=== Network ===
* 10/100/1000Mbps Etherne
* 10/100/1000Mbps Ethernet
* WiFi 802.11 b/g/n with Bluetooth 4.0 (optional)
* WiFi 802.11 b/g/n with Bluetooth 4.0 (optional)


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=== Expansion Ports ===
=== Expansion Ports ===
* DSI - Display Serial Interface, 4 lanes MiPi, up to 1080P
* DSI - Display Serial Interface, 4 lanes MiPi, up to 1080P
* CSI - CMOS Camera Interface up to 5 mega pixel
* TP - Touch Panel Port, SPI with interrupt
* TP - Touch Panel Port, SPI with interrupt
* RTC - Real Time Clock Battery Connector
* RTC - Real Time Clock Battery Connector
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== SOEdge Module and Baseboard Information, Schematics, and Certifications ==
== SOEdge Module and Baseboard Information, Schematics, and Certifications ==
* Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm
* Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm
* Input Power: DC 5V @ 2A, 3.7V Li-Ion battery connector, 3.5OD/1.35ID Barrel DC Jack connector, Euler connector
* Input Power: DC 12V @ 3A 5.5OD/2.1ID Barrel DC Jack connector
* [http://wiki.pine64.org/images/7/7d/Pine64_Board_Connector.png PINE A64 Connector Layout @courtesy of norm24]
 
* [http://wiki.pine64.org/images/d/da/Pine64_Connector.JPG PINE A64 Connector List]
* SOEdge Module Schematic:
* [http://files.pine64.org/doc/SOEdge/SOEdge%20Pin%20Assignments%20ver%201.00.xslx SOEdge Module Pin Assignment ver 1.0 in Excel format(includes comparision chart to SOPine)]
** [https://files.pine64.org/doc/SOEdge/SOEdge-Schematic-v2.0-190919.pdf SOEdge Module ver 2.0 20190919 Schematic]
* [http://files.pine64.org/doc/SOEdge/SOEdge%20Pin%20Assignments%20ver%201.00.ods SOEdge Module Pin Assignment ver 1.0 in Open Document format(includes comparision chart to SOPine)]
** [https://files.pine64.org/doc/SOEdge/SoEdge-PCB-placement-v2.0-topplace.pdf SOEdge Module ver 2.0 20190919 PCB Component Placement Top PDF file]
* [https://forum.pine64.org/showthread.php?tid=8058 a PDF mapping the pins from the A64 chip itself, to the gold-fingers on the SO-DIMM edge, to the multiple connectors on the baseboard and on the clusterboard, attached to this forum post.]
** [https://files.pine64.org/doc/SOEdge/SoEdge-PCB-placement-v2.0-bottomplace.pdf SOEdge Module ver 2.0 20190919 PCB Component Placement Bottom PDF file]
* [http://files.pine64.org/doc/Pine%20A64%20Schematic/Pine%20A64%20Pin%20Assignment%20160119.pdf PINE A64 Pi-2/Eular/Ext Bus/Wifi Bus Connector Pin Assignment (Updated 15/Feb/2016)]
** [https://files.pine64.org/doc/SOEdge/SoEdge-PCB-placement-v2.0-topplace.dxf SOEdge Module ver 2.0 20190919 PCB Component Placement Top Drawing file]
** [http://synfare.com/599N105E/hwdocs/pine64/index.html Good documentation about PINE A64, A64+, and A64-LTS GPIO pins article]
** [https://files.pine64.org/doc/SOEdge/SoEdge-PCB-placement-v2.0-bottomplace.dxf SOEdge Module ver 2.0 20190919 PCB Component Placement Bottom Drawing file]
* SOPine Module Schematic:
** [https://files.pine64.org/doc/SOEdge/SOEdge%20Pin%20Assignments%20ver%201.00.xlsx SOEdge Module Pin Assignment ver 1.0 in Excel format(includes comparison chart to SOPine)]
** [http://files.pine64.org/doc/SOPINE-A64/SOPINE-A64-Schematic-ver-0.9.pdf SOPine Module Schematic]
** [https://files.pine64.org/doc/SOEdge/SOEdge%20Pin%20Assignments%20ver%201.00.ods SOEdge Module Pin Assignment ver 1.0 in Open Document format(includes comparison chart to SOPine)]
* SOPine Model "A" Baseboard Schematic and PCB Board Resource:
* SOEdge Model "A" Baseboard Schematic and PCB Board Resource:
** '''SOPine model "A" Baseboard is an hardware open source project but is not "OSH" compliance.:'''
** [https://files.pine64.org/doc/SOEdge/SOEDGE_MODEL_A_BASEBOARD_Schematic-20210223.pdf SOEdge Model "A" Baseboard Schematic 20210223 PDF file]
** [http://files.pine64.org/doc/SOPINE-A64/SOPine%20Baseboard%20Model%20A%20Rev%20B20170207.DSN SOPine Model "A" Baseboard Schematic capture Rev B DSN source file]
** [https://files.pine64.org/doc/SOEdge/SOEDGE_MODEL_A_BASEBOARD_PCB-TOP-20210223.pdf SOEdge Model "A" Baseboard 20210223 PCB Component Placement Top PDF file]
** [http://files.pine64.org/doc/SOPINE-A64/SOPine%20Baseboard%20Model%20A%20Rev%20B20170207.pdf SOPine Model "A" Baseboard Schematic Rev B PDF file]
** [https://files.pine64.org/doc/SOEdge/SOEDGE_MODEL_A_BASEBOARD_PCB-BOT-20210223.pdf SOEdge Model "A" Baseboard 20210223 PCB Component Placement Bottom PDF file]
** [http://files.pine64.org/doc/SOPINE-A64/SOPine%20Model%20A%20baseboard%20PCB%20layout%20PCB%20Job.tar SOPine Model "A" Baseboard PCB Job source file]
* SOEdge Neural AI Stick Schematic:
** [http://files.pine64.org/doc/SOPINE-A64/SOPine%20Model%20A%20basedboard%20GERBER.tar SOPine Model "A" Baseboard PCB Gerber file]
** [https://files.pine64.org/doc/SOEdge/SOEdge%20Neural%20AI%20Stick%20Schematic_V10.pdf SOEdge Neural AI Stick PDF file]
** [http://files.pine64.org/doc/SOPINE-A64/SOPine%20Model%20A%20baseboard%20PCB%20layout%20PDF.tar SOPine Model "A" Baseboard PCB Layout PDF file]
* SOEdge/SOPine/PINE A64 Wifi/BT module Schematic
* PINE A64-LTS / SOPine Wifi/BT module Schematic
** [https://files.pine64.org/doc/Pine%20A64%20Schematic/A64-DB-WIFI-BT-REV%20B.pdf PINE A64 Wifi/BT Module Schematic]
** [http://files.pine64.org/doc/Pine%20A64%20Schematic/A64-DB-WIFI-BT-REV%20B.pdf PINE A64 Wifi/BT Module Schematic]
* SOEdge module together with model "A" baseboard Certification:
* PINE A64-LTS / SOPine Stereo Audio Dac Board Schematic
** Disclaimer: Please note that SOEdge module is not a "final" product and in general certification is not necessary. However, SOEdge module still submits the mpdel A baseboard for FCC, CE, and ROHS certifications and obtain the certificates to prove that can pass the testing. Please note, a final commercial product needs to perform its own testing and obtain its own certificate.
**[https://forum.pine64.org/attachment.php?aid=697 PINE A64-LTS / SOPine Stereo Audio Dac Board Schematic]
** Not yet available
* SOPine (together with model "A" baseboard) Certification:
** Disclaimer: Please note that PINE64 SBC is not a "final" product and in general certification is not necessary. However, PINE64 still submits the SBC for FCC, CE, and ROHS certifications and obtain the certificates to prove that the SBC board can pass the testing. Please note, a final commercial product needs to perform its own testing and obtain its own certificate.
** [http://files.pine64.org/doc/cert/SOPine%20FCC%20certification%20VOC20170428.pdf SOPine with model "A" baseboard FCC Certificate]
** [http://files.pine64.org/doc/cert/SOPine%20CE%20certification%20VOC20170428.pdf SOPine with model "A" baseboard CE Certificate]
** [http://files.pine64.org/doc/cert/SOPine%20ROHS%20certification%20VOC20170322.pdf SOPine with model "A" baseboard RoHS Certificate]


== Datasheets for Components and Peripherals ==
== Datasheets for Components and Peripherals ==
* Rockchip RK1808 SoC information:
* Rockchip RK1808 SoC information:
** '''R18 and A64 are identical SoC but R18 committed for 10 years supply by vendor.'''
** [http://opensource.rock-chips.com/images/4/43/Rockchip_RK1808_Datasheet_V1.2_20190527.pdf Rockchip RK1808 ver 1.2 datasheet]
** [http://opensource.rock-chips.com/images/4/43/Rockchip_RK1808_Datasheet_V1.2_20190527.pdf Rockchip RK1808 ver 1.2 datasheet]
* X-Powers AXP803 PMU (Power Management Unit) information:
** [https://files.pine64.org/doc/datasheet/SOEdge/Rockchip%20RK1808%20TRM%20Part1%20V1.2--20190826%20open%20source.pdf Rockchip TK1808 Technical Reference Manual Part 1]
** [http://files.pine64.org/doc/datasheet/pine64/AXP803_Datasheet_V1.0.pdf AXP803 PMIC Datasheet]
* Rockchip RK809 PMU (Power Management Unit) information:
** [https://rockchip.fr/RK809%20datasheet%20V1.01.pdf Rockchip RK809 PMIC Datasheet]
* DDR4 information:
* DDR4 information:
** [http://files.pine64.org/doc/datasheet/pine64/AWL3A1632_mobile_lpddr3_1600Mbps.pdf Allwinner LPDDR3 Datasheet]
** [https://files.pine64.org/doc/datasheet/SOEdge/Micron%208Gb_DDR4_SDRAM.pdf Micron DDR4 Datasheet]
** [http://files.pine64.org/doc/datasheet/pine64/FORESEE%20178ball%2012x11.5%20LPDDR3%2016G%20Spec%20V1.0-1228.pdf Foresee LPDDR3 Datasheet]
** [http://files.pine64.org/doc/datasheet/pine64/K4E6E304EE-EGCE.pdf Samsung LPDDR3 Datasheet]
** [http://files.pine64.org/doc/datasheet/pine64/LPDDR3%20178ball%208Gb_H9CCNNN8JTALAR_Rev1.0.pdf Hynix LPDDR3 Datasheet]
* eMMC information:
* eMMC information:
** [http://files.pine64.org/doc/rock64/PINE64_eMMC_Module_20170719.pdf PINE64 eMMC module schematic]
** [https://files.pine64.org/doc/rock64/PINE64_eMMC_Module_20170719.pdf PINE64 eMMC module schematic]
** [http://files.pine64.org/doc/rock64/usb%20emmc%20module%20adapter%20v2.pdf PINE64 USB adapter for eMMC module V2 schematic]
** [https://files.pine64.org/doc/rock64/usb%20emmc%20module%20adapter%20v2.pdf PINE64 USB adapter for eMMC module V2 schematic]
** [http://files.pine64.org/doc/rock64/USB%20adapter%20for%20eMMC%20module%20PCB.tar PINE64 USB adapter for eMMC module PCB in JPEG]
** [https://files.pine64.org/doc/rock64/USB%20adapter%20for%20eMMC%20module%20PCB.tar PINE64 USB adapter for eMMC module PCB in JPEG]
** [http://files.pine64.org/doc/datasheet/pine64/E-00517%20FORESEE_eMMC_NCEMAM8B-16G%20SPEC.pdf 16GB Foresee eMMC Datasheet]
** [https://files.pine64.org/doc/datasheet/pine64/E-00517%20FORESEE_eMMC_NCEMAM8B-16G%20SPEC.pdf 16GB Foresee eMMC Datasheet]
** [http://files.pine64.org/doc/datasheet/pine64/SDINADF4-16-128GB-H%20data%20sheet%20v1.13.pdf 32GB/64GB/128GB SanDisk eMMC Datasheet]
** [https://files.pine64.org/doc/datasheet/pine64/SDINADF4-16-128GB-H%20data%20sheet%20v1.13.pdf 32GB/64GB/128GB SanDisk eMMC Datasheet]
* SPI NOR Flash information:
* SPI NOR Flash information:
** [http://files.pine64.org/doc/datasheet/pine64/w25q128jv%20spi%20revc%2011162016.pdf WinBond 128Mb SPI Flash Datasheet]
** [https://files.pine64.org/doc/datasheet/pine64/w25q128jv%20spi%20revc%2011162016.pdf WinBond 128Mb SPI Flash Datasheet]
** [http://files.pine64.org/doc/datasheet/pine64/GD25Q128C-Rev2.5.pdf GigaDevice 128Mb SPI Flash Datasheet]
** [https://files.pine64.org/doc/datasheet/pine64/GD25Q128C-Rev2.5.pdf GigaDevice 128Mb SPI Flash Datasheet]
* '''PINE A64, PINE A64+, PINE A64-LTS and SOPINE Related:'''
* '''SOEdge Related:'''
** 5MPixel CMOS Camera module information:
*** [http://files.pine64.org/doc/datasheet/pine64/YL-PINE64-4EC.pdf PINE64 YL-PINE64-4EC 5M Pixel CMOS Image Sensor Module (Description in Chinese)]
*** [http://files.pine64.org/doc/datasheet/pine64/S5K4EC%205M%208%205X8%205%20PLCC%20%20Data%20Sheet_V1.0.pdf S5K4EC 5MP CMOS Image Sensor SoC Module Datasheet]
*** [http://files.pine64.org/doc/datasheet/pine64/S5K4ECGX_EVT1_DataSheet_R005_20100816.pdf S5K4EC 5MP CMOS Image Sensor SoC Chip Datasheet]
*** [http://files.pine64.org/doc/datasheet/pine64/s5k4ec.c S5K4EC 5MP CMOS Image Sensor Driver Source Code in C language]
** LCD Touch Screen Panel information:
** LCD Touch Screen Panel information:
*** [http://files.pine64.org/doc/datasheet/pine64/FY07024DI26A30-D_feiyang_LCD_panel.pdf 7.0" 1200x600 TFT-LCD Panel Specification]
*** [https://files.pine64.org/doc/datasheet/pine64/FY07024DI26A30-D_feiyang_LCD_panel.pdf 7.0" 1200x600 TFT-LCD Panel Specification]
*** [http://files.pine64.org/doc/datasheet/pine64/HK70DR2459-PG-V01.pdf Touch Panel Specification]
*** [https://files.pine64.org/doc/datasheet/pine64/HK70DR2459-PG-V01.pdf Touch Panel Specification]
*** [http://files.pine64.org/doc/datasheet/pine64/GT911%20Capacitive%20Touch%20Controller%20Datasheet.pdf GOODiX GT911 5-Point Capacitive Touch Controller Datasheet]
*** [https://files.pine64.org/doc/datasheet/pine64/GT911%20Capacitive%20Touch%20Controller%20Datasheet.pdf GOODiX GT911 5-Point Capacitive Touch Controller Datasheet]
** Ethernet PHY information:
** Ethernet PHY information:
*** [http://files.pine64.org/doc/datasheet/pine64/rtl8211e(g)-vb(vl)-cg_datasheet_1.6.pdf Realtek RTL8211 10/100/1000M Ethernet Transceiver for SOEdge model A baseboard]
*** [https://files.pine64.org/doc/datasheet/pine64/rtl8211e(g)-vb(vl)-cg_datasheet_1.6.pdf Realtek RTL8211 10/100/1000M Ethernet Transceiver for SOEdge model A baseboard]
** Wifi/BT module information:
** Wifi/BT module information:
*** [http://files.pine64.org/doc/Pine%20A64%20Schematic/A64-DB-WIFI-BT-REV%20B.pdf SOEdge/SOPine/PINE A64 Wifi/BT Module Schematic]
*** [https://files.pine64.org/doc/Pine%20A64%20Schematic/A64-DB-WIFI-BT-REV%20B.pdf SOEdge/SOPine/PINE A64 Wifi/BT Module Schematic]
*** [http://files.pine64.org/doc/datasheet/pine64/RTL8723BS.pdf Realtek RTL8723BS WiFi with BT SDIO]
*** [https://files.pine64.org/doc/datasheet/pine64/RTL8723BS.pdf Realtek RTL8723BS WiFi with BT SDIO]
** Enclosure information:
** Enclosure information:
*** [http://files.pine64.org/doc/datasheet/case/playbox_enclosure_20160426.stp Playbox Enclosure 3D file]
*** [https://files.pine64.org/doc/datasheet/case/playbox_enclosure_20160426.stp Playbox Enclosure 3D file]
*** [http://files.pine64.org/doc/datasheet/case/ABS_enclosure_20160426.stp ABS Enclosure 3D file]
*** [https://files.pine64.org/doc/datasheet/case/ABS_enclosure_20160426.stp ABS Enclosure 3D file]
*** [http://files.pine64.org/doc/datasheet/case/pine64%20Die%20Cast%20casing-final.jpg Outdoor Aluminum Cast Dust-proof IP67 Enclosure Drawing]
*** [https://files.pine64.org/doc/datasheet/case/pine64%20Die%20Cast%20casing-final.jpg Outdoor Aluminum Cast Dust-proof IP67 Enclosure Drawing]
** Connector information:
** Connector information:
*** [http://files.pine64.org/doc/datasheet/pine64/ePH.pdf 2.0mm PH Type connector specification use in Lithium Battery (VBAT) port and RTC Battery port]
*** [https://files.pine64.org/doc/datasheet/pine64/ePH.pdf 2.0mm PH Type connector specification use in Lithium Battery (VBAT) port and RTC Battery port]
*** [http://files.pine64.org/doc/datasheet/pine64/0.5FPC%20Front%20Open%20Connector%20H=1.5.pdf 0.5mm Pitch cover type FPC connector specification use in DSI port, TP port and CSI port]
*** [https://files.pine64.org/doc/datasheet/pine64/0.5FPC%20Front%20Open%20Connector%20H=1.5.pdf 0.5mm Pitch cover type FPC connector specification use in DSI port, TP port and CSI port]


== SOEdge/SOPine Cluster Board Resource ==
== SOEdge/SOPine Cluster Board Resource ==
* Cluster board is an hardware open source project and will be available at PINE64 store on late January 2018.  
* Cluster board is an hardware open source project and will be available at PINE64 store on late January 2018.  
* Please note that this project is not "OSH" compliance.:
* Please note that this project is not "OSH" compliance.:
** [http://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2.DSN Clusterboard version 2.2 Schematic Capture source file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2.DSN Clusterboard version 2.2 Schematic Capture source file]
** [http://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2_Schematic.pdf Clusterboard version 2.2 Schematic Capture PDF file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2_Schematic.pdf Clusterboard version 2.2 Schematic Capture PDF file]
** [http://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2.brd Clusterboard version 2.2 PCB Job source file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2.brd Clusterboard version 2.2 PCB Job source file]
** [http://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD%20V2.2-gerber.rar Clusterboard version 2.2 PCB Gerber file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD%20V2.2-gerber.rar Clusterboard version 2.2 PCB Gerber file]
** [http://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2_PCB.pdf Clusterboard version 2.2 PCB Layout PDF file]
** [https://files.pine64.org/doc/clusterboard/PINE64%20CLUSTER%20BOARD_2_2_PCB.pdf Clusterboard version 2.2 PCB Layout PDF file]
** [http://files.pine64.org/doc/clusterboard/clusterboard_20pins_header.jpg Clusterboard 20pins header definition]
** [https://files.pine64.org/doc/clusterboard/clusterboard_20pins_header.jpg Clusterboard 20pins header definition]
** [https://myhub.autodesk360.com/ue2b2f72e/g/shares/SH56a43QTfd62c1cd96840f4ec37c60bcf12 Clusterboard 3D drawing in Fusion360]
** [https://myhub.autodesk360.com/ue2b2f72e/g/shares/SH56a43QTfd62c1cd96840f4ec37c60bcf12 Clusterboard 3D drawing in Fusion360]
** [https://myhub.autodesk360.com/ue2b2f72e/g/shares/SH56a43QTfd62c1cd968cd6bc203ac753401?viewState=NoIgbgDAdAjCA0ICGBmARgEwGZIOwGMBaDFADgFNCAWfAJi2o1IFZDmlTSIA2DW8-FTQgAukA Clusterboard PDF drawing]
** [https://myhub.autodesk360.com/ue2b2f72e/g/shares/SH56a43QTfd62c1cd968cd6bc203ac753401?viewState=NoIgbgDAdAjCA0ICGBmARgEwGZIOwGMBaDFADgFNCAWfAJi2o1IFZDmlTSIA2DW8-FTQgAukA Clusterboard PDF drawing]
= Linux Image Releases =
== Stock BSP ==
=== BSP Linux ver 1.1 Build from SDK ===
* Please unzip first and then using Rockchip tool to flash in
* [https://wiki.pine64.org/index.php/NOOB#Flashing_to_eMMC_using_Rockchip_Tools_.28Rock64_Only.29 Guide to flashing eMMC using Rockchip Tools]
** [http://files.pine64.org/os/SOEdge/stock/SOEdge_linux_v1.1.img.gz download from pine64.org]
** MD5 (TAR-GZip file): a6629f997ae2cae7d9d5324c4e942deda9
** File Size: 119MB
=== BSP Linux ver 1.1 Build as USB Stick application from SDK ===
* Please unzip first and then using Rockchip tool to flash in
* [https://wiki.pine64.org/index.php/NOOB#Flashing_to_eMMC_using_Rockchip_Tools_.28Rock64_Only.29 Guide to flashing eMMC using Rockchip Tools]
** [http://files.pine64.org/os/SOEdge/stock/SOEdge_linux_usb_compute_stick.img.gz download from pine64.org]
** MD5 (GZip file): af6ac45995f7ddd9343a7052efffaf30
** File Size: 47MB
== Factory Test Build ==
* Factory Test Build by Gamiee
* DD image (for 8GB microSD card or eMMC Module and above)
** [http://files.pine64.org/os/SOEdge/gamiee/update-soedge-factory-test-2021-03-23.img.gz download from pine64.org]
** MD5 (GZip file): b3d09933734eaaebb34c357b73f5c69e
** File Size: 119MB
= Linux BSP SDK =
== Linux BSP Kernel ver 1.1 ==
* [http://files.pine64.org/SDK/SOEdge/SOEdge_RK-BSP_SDK_v1.1.tar.gz Direct Download from pine64.org]
** MD5 (TAR-GZip file): a66c92e52824762d7c0a63400d6342ea
** File Size: 13.55GB
== Linux BSP Kernel ver 1.1 as USB Stick application ==
* [http://files.pine64.org/SDK/SOEdge/SOEdge_RK-BSP_USB_Dongle_SDK_v1.1.tar.gz Direct Download from pine64.org]
** MD5 (TAR-GZip file): 46f12441e8c35c06184681f355c89651
** File Size: 9.65GB


== Other Resources ==
== Other Resources ==
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[[Category:SOEdge]] [[Category:SOPine Clusterboard]] [[Category:SOEdge Baseboard]]
[[Category:SOPine]] [[Category:Rockchip RK1808]]

Revision as of 14:43, 28 June 2021

The SOEdge is a 3TOPS compute module that can be paired with the SOPine base board or USB 3.0 and PCIe adapters for development. It can connect to a SBC, such as the ROCKPro64 or a regular PC.

Software and OS Image Downloads

SOEdge Software Release

The SOEdge software releases can be found in the article SOEdge Software Release.

Accessories Step-by-Step Guides

Under 'Guides for model A baseboard accessories' you can find instructions and guides concerning:

  • Enclosures
  • Bluetooth and WiFi module
  • Real Time Clock (RTC) battery
  • Real Time Clock (RTC) battery holder
  • First and third party cases
  • Featured 3D printed cases (and more)

SoC and Memory Specification

RK1808 icon.png

CPU Architecture

  • Dual-core ARM Cortex-A35 Processor@1600-2000Mhz
  • A power-efficient ARM 64-Bit Armv8-A architecture
  • AArch32 for full backward compatibility with Armv7
  • Support NEON Advanced SIMD (Single Instruction Multiple Data) instruction for acceleration of media and signal processing function
  • Support Large Physical Address Extensions(LPAE)
  • VFPv4 Floating Point Unit
  • 32KB L1 Instruction cache and 32KB L1 Data cache
  • AArch64 for 64-bit support and new architectural features
  • TrustZone security technology
  • Neon Advanced SIMD
  • DSP and SIMD extensions
  • VFPv4 Floating point
  • Hardware virtualization support
  • 128KB L2 cache


Neural Process Unit NPU Capability

Vivante Acuity SDK.jpg

System Memory

  • RAM Memory Variants: 2GB DDR4.
  • Storage Memory: 128Mb SPI Flash and optional eMMC module from 16GB up to 128GB

SOEdge Baseboard Features

Network

  • 10/100/1000Mbps Ethernet
  • WiFi 802.11 b/g/n with Bluetooth 4.0 (optional)

Storage

  • microSD - bootable, support SDHC and SDXC, storage up to 256GB
  • USB - 2 USB2.0 Host port

Expansion Ports

  • DSI - Display Serial Interface, 4 lanes MiPi, up to 1080P
  • TP - Touch Panel Port, SPI with interrupt
  • RTC - Real Time Clock Battery Connector
  • VBAT - Lithium Battery Connector with temperature sensor input
  • Wifi/BT Module Header - SDIO 3.0 and UART
  • 2x20 pins "Pi2" GPIO Header
  • PCIe 2x open ended slot

SOEdge Module and Baseboard Information, Schematics, and Certifications

  • Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm
  • Input Power: DC 12V @ 3A 5.5OD/2.1ID Barrel DC Jack connector

Datasheets for Components and Peripherals

SOEdge/SOPine Cluster Board Resource


Linux Image Releases

Stock BSP

BSP Linux ver 1.1 Build from SDK

BSP Linux ver 1.1 Build as USB Stick application from SDK


Factory Test Build

  • Factory Test Build by Gamiee
  • DD image (for 8GB microSD card or eMMC Module and above)


Linux BSP SDK

Linux BSP Kernel ver 1.1

Linux BSP Kernel ver 1.1 as USB Stick application


Other Resources