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== '''CPU Architecture''' ==
Quad-core ARM Cortex-A53 Processor


A power-efficient ARM v8 architecture
64 and 32bit execution states for scalable high performance
Support NEON Advanced SIMD (Single Instruction Multiple Data) instruction for acceleration of media and signal processing function
Support Large Physical Address Extensions(LPAE)
VFPv4 Floating Point Unit
32KB L1 Instruction cache and 32KB L1 Data cache
512KB L2 cache


== '''Pine A64 Hardware Pin  Assignment information''' ==
== '''Pine A64 Hardware Pin  Assignment information''' ==

Revision as of 11:59, 9 December 2015

CPU Architecture

Quad-core ARM Cortex-A53 Processor

A power-efficient ARM v8 architecture

64 and 32bit execution states for scalable high performance

Support NEON Advanced SIMD (Single Instruction Multiple Data) instruction for acceleration of media and signal processing function

Support Large Physical Address Extensions(LPAE)

VFPv4 Floating Point Unit

32KB L1 Instruction cache and 32KB L1 Data cache

512KB L2 cache

Pine A64 Hardware Pin Assignment information

Pine64 Connector

Eular Connector Pin Assignment

Pi Connector Pin Assignment