Difference between revisions of "File:UART-pinecil-breakout-board-testing30.png"
Jump to navigation
Jump to search
m |
m (typo) |
||
Line 5: | Line 5: | ||
* reverse the RX and TX when connecting so that Rx --> TX and TX --> RX between the 2 boards. | * reverse the RX and TX when connecting so that Rx --> TX and TX --> RX between the 2 boards. | ||
* example here with Sipeed RV-debugger-plus JTAG+UART BL702, a full-featured open source support for secondary development | * example here with Sipeed RV-debugger-plus JTAG+UART BL702, a full-featured open source support for secondary development | ||
* Github repo for [ | * Github repo for [https://github.com/sipeed/RV-Debugger-BL702 [SiPeed device] | ||
[[Category: Pinecil]] | [[Category: Pinecil]] |
Revision as of 01:58, 7 April 2023
Summary
Pinecil Break-out board for debugging and dev.
- attach to any UART ttl converter.
- reverse the RX and TX when connecting so that Rx --> TX and TX --> RX between the 2 boards.
- example here with Sipeed RV-debugger-plus JTAG+UART BL702, a full-featured open source support for secondary development
- Github repo for [SiPeed device
File history
Click on a date/time to view the file as it appeared at that time.
Date/Time | Thumbnail | Dimensions | User | Comment | |
---|---|---|---|---|---|
current | 21:37, 10 April 2023 | 1,306 × 777 (1.6 MB) | River (talk | contribs) | includ Baud speed | |
01:54, 7 April 2023 | 1,306 × 777 (1.63 MB) | River (talk | contribs) | |||
01:11, 7 April 2023 | 1,306 × 777 (1.64 MB) | River (talk | contribs) | Pinecil Break-out board for debugging and dev. - attach to any UART ttl converter. - example here with Sipeed RV-debugger-plus JTAG+UART BL702, a full-featured open source support for secondary development - Github repo for [SiPeed device](https://github.com/sipeed/RV-Debugger-BL702) Category: Pinecil |
You cannot overwrite this file.
File usage
The following page uses this file: