Difference between revisions of "Pinebook Pro"
Jump to navigation
Jump to search
(Make clear which attributes apply to both clusters and which are unique for each.) |
|||
| Line 54: | Line 54: | ||
=== CPU Architecture === | === CPU Architecture === | ||
* big.LITTLE architecture: Dual Cortex-A72 + Quad Cortex-A53, 64-bit CPU | * big.LITTLE architecture: Dual Cortex-A72 + Quad Cortex-A53, 64-bit CPU | ||
* Cortex-A72: | ** Full implementation of the ARM architecture v8-A instruction set (both AArch64 and AArch32) | ||
** | ** ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation | ||
** | ** ARMv8 Cryptography Extensions | ||
** VFPv4 floating point unit supporting single and double-precision operations | |||
** Hardware virtualization support | |||
** TrustZone technology support | |||
** Full CoreSight debug solution | |||
** One isolated voltage domain to support DVFS | |||
* Cortex-A72 (big cluster): | |||
** [https://developer.arm.com/products/processors/cortex-a/cortex-a72 Dual-core Cortex-A72 up to 2.0GHz CPU] | |||
** Superscalar, variable-length, out-of-order pipeline | |||
** L1 cache 48KB Icache and 32KB Dcache for each A72 | ** L1 cache 48KB Icache and 32KB Dcache for each A72 | ||
** L2 cache 1024KB for big cluster | ** L2 cache 1024KB for big cluster | ||
* | * Cortex-A53 (little cluster): | ||
** | ** [https://developer.arm.com/products/processors/cortex-a/cortex-a53 Quad-core Cortex-A53 up to 1.5GHz CPU] | ||
** | ** In-order pipeline with symmetric dual-issue of most instructions | ||
** L1 cache 32KB Icache and 32KB Dcache for each A53 | ** L1 cache 32KB Icache and 32KB Dcache for each A53 | ||
** L2 cache 512KB for little cluster | ** L2 cache 512KB for little cluster | ||
=== GPU Architecture === | === GPU Architecture === | ||
Revision as of 15:06, 1 October 2019
Software and OS Image Downloads
Pinebook Pro
Under 'Pinebook Pro Software and OS Image Download Section' you will find a complete list of currently supported Operating System images that work with the Pinebook as well as other related software. The list includes OS images and descriptions of:
Quick Links to OS Images Build Sources
Some of the provided OS images are still in beta or nightly build and only fit for testing purposes. These images ought to be avoided for normal usage - use them at your own risk
- ayufan's Linux build repo
- ayufan's Chromium OS build repo
- mrfixit2001's Linux debian desktop build repo
- Q4OS
Pinebook Service Step-by-Step Guides
Under 'Service Guides for Pinebook' you can instructions guides concerning disassembly of:
Note: The installation process on Pinebook Pro similar to 14" Pinebook
Note: The installation process is the reverse order of removal guide
- 14″ Pinebook Lithium Battery Pack Removal Guide
- 14″ Pinebook LCD Panel Screen Removal Guide
- 14″ Pinebook eMMC Module Removal Guide
Pinebook Pro Information
- Dimensions: 329mm x 220mm x 12mm (WxDxH)
- Weight: 1.26Kg
- Input Power: DC 5V @ 3A 3.5mm OD/ 1.35mm ID Barrel jack or USB-C 15W PD quickcharge
SoC and Memory Specification
- Based on Rockchip RK3399
CPU Architecture
- big.LITTLE architecture: Dual Cortex-A72 + Quad Cortex-A53, 64-bit CPU
- Full implementation of the ARM architecture v8-A instruction set (both AArch64 and AArch32)
- ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation
- ARMv8 Cryptography Extensions
- VFPv4 floating point unit supporting single and double-precision operations
- Hardware virtualization support
- TrustZone technology support
- Full CoreSight debug solution
- One isolated voltage domain to support DVFS
- Cortex-A72 (big cluster):
- Dual-core Cortex-A72 up to 2.0GHz CPU
- Superscalar, variable-length, out-of-order pipeline
- L1 cache 48KB Icache and 32KB Dcache for each A72
- L2 cache 1024KB for big cluster
- Cortex-A53 (little cluster):
- Quad-core Cortex-A53 up to 1.5GHz CPU
- In-order pipeline with symmetric dual-issue of most instructions
- L1 cache 32KB Icache and 32KB Dcache for each A53
- L2 cache 512KB for little cluster
GPU Architecture
- ARM Mali-T860MP4 Quad-core GPU
- The highest performance GPUs built on Arm Mali’s famous Midgard architecture, the Mali-T860 GPU is designed for complex graphics use cases and provide stunning visuals for UHD content.
- Frequency 650MHz
- Throughput 1300Mtri/s, 10.4Gpix/s
- OpenGL® ES 1.1, 1.2, 2.0, 3.1, 3.2., Vulkan 1.0*., OpenCL™ 1.1, 1.2., DirectX® 11 FL11_1., RenderScript™.
System Memory
- LPDDR4 RAM Memory Variants: Dual Channels 4GB.
- Storage Memory:
- 64GB eMMC module, can be upgrade to 128GB eMMC module. The initial PINE64 community build version comes with 128GB eMMC configuration
- 128Mb built-in SPI Flash memory
Battery
- Lithium Polymer Battery (10,000mAH)
Display
- 14.1" 1920x1080 IPS LCD panel
Video
- USB-C Alt model DP up to 3840x2160p60
Audio
- 3.5mm stereo earphone/microphone plug
- Build in stereo speaker
Network
- WiFi 802.11 b/g/n/ac with Bluetooth 5.0
Expansion Ports
- microSD - bootable, support SDHC and SDXC, storage up to 256GB
- USB - 1x USB2.0 Type-A Host Port, 1x USB3.0 Type-A Host Port, 1x USB3.0 Type-C OTG Port
- optional NVMe adapter
- earphone plug with UART console mux circuit
Pinebook Pro Schematics and Certifications
- Pinebook Pro Main Board Schematic:
- Pinebook Daughter Board Schematic:
- Pinebook Pro NVMe Adapter Schematic:
- Serial Console Earphone Jack Pinout:
- Pinebook Pro Certifications:
- Not Yet Available
Datasheets for Components and Peripherals
- Rockchip RK3399 SoC information:
- LPDDR4 (366 Balls) SDRAM:
- eMMC information:
- SPI NOR Flash information:
- Wireless related info:
- Audio Codec (ES8316)
- LCD Panel:
- Touchpad information:
- Full HD Camera sensor:
- Lithium Battery information: