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PINE64 - User contributions [en]
2024-03-29T14:46:45Z
User contributions
MediaWiki 1.37.1
https://wiki.pine64.org/index.php?title=SOQuartz&diff=15203
SOQuartz
2022-12-16T15:46:30Z
<p>Jeffalyanak: /* Jumpers */</p>
<hr />
<div>[[File:SOQuartz module-1s.jpg|400px|thumb|right|The SOQuartz]]<br />
<br />
The '''SOQuartz''' is a RK3566 based compute module and parts of Quartz64 series. <br />
<br />
== Software releases ==<br />
<br />
The SOQuartz software releases can be found in the article [[SOQuartz Software Releases]].<br />
<br />
== SoC and Memory Specification ==<br />
* Based on [https://www.rock-chips.com/a/en/products/RK35_Series/2021/0113/1274.html Rockchip RK3566]<br />
[[File:RK3566_icon.png|right]]<br />
<br />
=== CPU Architecture ===<br />
* [https://developer.arm.com/ip-products/processors/cortex-a/cortex-a55 Quad-core ARM Cortex-A55@1.8GHz]<br />
* AArch32 for full backwards compatibility with ARMv7<br />
* ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation<br />
* Includes VFP hardware to support single and double-precision operations<br />
* ARMv8 Cryptography Extensions<br />
* Integrated 32KB L1 instruction cache and 32KB L1 data cache per core<br />
* 512KB unified system L3 cache<br />
<br />
=== GPU (Graphics Processing Unit) Capabilities ===<br />
* [https://developer.arm.com/ip-products/graphics-and-multimedia/mali-gpus/mali-g52-gpu Mali-G52 2EE Bifrost GPU@800MHz]<br />
* 4x Multi-Sampling Anti-Aliasing (MSAA) with minimal performance drop <br />
* 128KB L2 Cache configurations<br />
* Supports OpenGL ES 1.1, 2.0, and 3.2<br />
* Supports Vulkan 1.0 and 1.1<br />
* Supports OpenCL 2.0 Full Profile<br />
* Supports 1600 Mpix/s fill rate when at 800MHz clock frequency<br />
* Supports 38.4 GLOP/s when at 800MHz clock frequency<br />
<br />
=== Neural Process Unit NPU Capability ===<br />
* Neural network acceleration engine with processing performance of up to 0.8 TOPS<br />
* Supports integer 8 and integer 16 convolution operations<br />
* Supports the following deep learning frameworks: TensorFlow, TF-lite, Pytorch, Caffe, ONNX, MXNet, Keras, Darknet<br />
<br />
=== System Memory ===<br />
* RAM Memory Variants: 2GB, 4GB, 8GB LPDDR4.<br />
* Storage Memory: optional 128Mb SPI Flash and optional eMMC module from 16GB up to 128GB<br />
<br />
=== Network ===<br />
* 10/100/1000Mbps Ethernet<br />
* WiFi 802.11 b/g/n/ac with Bluetooth 5.0<br />
<br />
== SOQuartz exposed peripherals ==<br />
<br />
=== Displays / Cameras ===<br />
<br />
* 1x HDMI<br />
* 2x DSI<br />
* 1x eDP (Instead of HDMI1)<br />
* 1x LVDS (not available when dual-mode DSI)<br />
* 1x CSI 4-line<br />
<br />
=== Connectivity ===<br />
<br />
* 1x Ethernet (1Gbit)<br />
* 1x USB 2.0 OTG<br />
* 1x SD Card (SD)<br />
* 1x PCIe 1-Line<br />
* 28x GPIO (TBD)<br />
<br />
== Connector Pins Definition ==<br />
* [https://files.pine64.org/doc/quartz64/SOQuartz%20Connector%20Pin%20Assignments%20ver%201.0.ods SOQuartz Module Connector Pins Definition ver 1.0]<br />
<br />
<br />
<br />
== SOQuartz Model-A Baseboard Features ==<br />
<br />
[[File:SOQuartz_model-A_baseboard.jpg |400px|thumb|SOQuartz Model-A Baseboard]]<br />
* Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm<br />
* Input Power: DC 12V @ 3A 5.5OD/2.1ID (IEC 60130-10 Type A) Barrel DC Jack connector<br />
<br />
=== Storage ===<br />
* microSD - bootable, support SDHC and SDXC, storage up to 2TB<br />
* USB - 2 USB2.0 Host port<br />
<br />
=== Expansion Ports ===<br />
* MiPi-CSI - 1x 2 lanes, 1x 4 lanes <br />
* MiPi-DSI - 1x 2 lanes, 1x 4 lanes <br />
* 2x20 pins "Pi2" GPIO Header<br />
* PCIe 1x open ended slot<br />
<br />
== SOQuartz BLADE Baseboard Features ==<br />
<br />
[[File:SOQuartz_BLADE_Dimension.jpg |400px|thumb|SOQuartz BLADE Baseboard]]<br />
* SOQuartz BLADE Baseboard Dimensions: 200mm x 40mm x 15mm<br />
* Input Power:<br />
** DC 12V @ 3A 3.4OD/1.3ID (IEC 60130-10 Type E) Barrel DC Jack connector<br />
** PoE<br />
<br />
=== Storage ===<br />
* microSD - bootable, support SDHC and SDXC, storage up to 2TB<br />
* USB - USB2.0 Host port (with header for setting OTG ID pin)<br />
<br />
=== Expansion Ports ===<br />
* 2x20 pins "Pi2" GPIO Header<br />
* M.2 slot<br />
* PWM fan header<br />
<br />
=== Jumpers ===<br />
* OTG ID jumper<br />
* GPIO voltage, select 3.3V or 1.8V<br />
* PoE Enable<br />
<br />
== SOQuartz Module and Baseboard Information, Schematics, and Certifications ==<br />
<br />
* SOQuartz Module Schematic:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz_SOM_schematic_v1.1_20210816.pdf SOQuartz Module ver 1.1 20210816 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-PCB-placement-v1.1.pdf SOQuartz Module ver 1.1 20210816 PCB Component Placement]<br />
<br />
* SOQuartz Model "A" Baseboard Schematic and PCB Board Resource:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-Model-A-Baseboard-Schematic-20220522.pdf SOQuartz Model-A baseboard 20220522 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-Model-A-Baseboard-Component-Placement_top-20220522.pdf SOQuartz SOQuartz Model-A baseboard 20220522 PCB Top Component Placement]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz_Model_A_Baseboard_Component_Placement_bottom_20220522.pdf SOQuartz SOQuartz Model-A baseboard 20220522 PCB Bottom Component Placement]<br />
<br />
<br />
[[File:BLADE_1U_half_width_server_rack.jpg |400px|thumb|SOQuartz BLADE 3D Print 1U half width server rack]]<br />
[[File:BLADE_1U_full_width_server_rack.jpg |400px|thumb|SOQuartz BLADE 3D Print 1U full width server rack]]<br />
* SOQuartz Blade Baseboard Schematic and PCB Board Resource:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-BLADE-Baseboard-Schematic-20220522.pdf SOQuartz BLADE 20220522 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-BLADE-PCB-Placement-20220522.pdf SOQuartz BLADE 20220522 PCB component Placement]<br />
** [https://files.pine64.org/doc/quartz64/BLADE%201U%20Rack_3D.stp SOQuartz BLADE 1U Rack STP file]<br />
[[File:BLADE_1U_rack_3D.jpg |400px]]<br />
<br />
== Datasheets for Components and Peripherals ==<br />
* Rockchip RK3566 SoC information:<br />
** [https://files.pine64.org/doc/quartz64/Rockchip%20RK3566%20Datasheet%20V1.0-20201210.pdf Rockchip RK3566 ver 1.0 datasheet, already got release permission from Rockchip]<br />
* Rockchip PMU (Power Management Unit) Information:<br />
** [https://www.rockchip.fr/RK809%20datasheet%20V1.01.pdf Rockchip RK809 ver 1.01 datasheet for SOQuartz PMU]<br />
* DDR4 information:<br />
** [https://files.pine64.org/doc/datasheet/rockpro64/SM512M32Z01MD2BNP(200BALL).pdf Micron LPDDR4 Mobile LPDDR4 Datasheet]<br />
* eMMC information:<br />
** [https://files.pine64.org/doc/rock64/PINE64_eMMC_Module_20170719.pdf PINE64 eMMC module schematic]<br />
** [https://files.pine64.org/doc/rock64/usb%20emmc%20module%20adapter%20v2.pdf PINE64 USB adapter for eMMC module V2 schematic]<br />
** [https://files.pine64.org/doc/rock64/USB%20adapter%20for%20eMMC%20module%20PCB.tar PINE64 USB adapter for eMMC module PCB in JPEG]<br />
** [https://files.pine64.org/doc/datasheet/pine64/E-00517%20FORESEE_eMMC_NCEMAM8B-16G%20SPEC.pdf 16GB Foresee eMMC Datasheet]<br />
** [https://files.pine64.org/doc/datasheet/pine64/SDINADF4-16-128GB-H%20data%20sheet%20v1.13.pdf 32GB/64GB/128GB SanDisk eMMC Datasheet]<br />
* SPI NOR Flash information:<br />
* Ethernet PHY information:<br />
** [https://files.pine64.org/doc/datasheet/pine64/rtl8211e(g)-vb(vl)-cg_datasheet_1.6.pdf Realtek RTL8211 10/100/1000M Ethernet Transceiver]<br />
* WiFi/BT module info:<br />
** [https://files.pine64.org/doc/datasheet/rockpro64/AW-CM256SM_DS_DF_V1.9_STD.pdf Azurewave CM256SM 11AC WiFi + Bluetooth5.0 Datasheet]<br />
* i2C to PWM Controller user in BLADE info:<br />
** [https://files.pine64.org/doc/datasheet/quartz64/GP7101_cn_V1_qsxn.pdf GP7101 i2c to PWM Controller Datasheet in Chinese]<br />
** GP7101 i2c to PWM Controller Datasheet translated to English by neggles [[File:GP7101 cn V1 qsxn en.pdf]]<br />
* PoE DC/DC Controller user in BLADE info:<br />
** [https://files.pine64.org/doc/datasheet/quartz64/SD4954B%20Datasheet.pdf Silan SD4954B PD and DC/DC Controller compatible with IEEE 802.3AF standard Datasheet]<br />
<br />
== SOQuartz Module with various CM4 carrier boards ==<br />
<br />
* For CM4 carrier board comprehensive list, please visit [https://pipci.jeffgeerling.com/boards_cm Jeff Geerling collection]<br />
<br />
[[File:SOQuartz_with_DF_Robot_carrier_board.jpg|400px|thumb|SOQuartz with DF Robot CM4 Carrier Board]]<br />
<br />
[[File:SOQuartz_with_Waveshare_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 Carrier Board]]<br />
<br />
[[File:SOQuartz_with_Waveshare_PoE_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 PoE Board]]<br />
<br />
<br />
<br />
== BSP Linux SDK ==<br />
<br />
=== BSP Linux SDK ver 4.19 for Quartz64 model A SBC ===<br />
* [http://files.pine64.org/SDK/Quartz64/QUARTZ64-model-A_BSP%20Linux.tar.gz Direct Download from pine64.org]<br />
** MD5 (TAR-GZip file): 24554419aec29700add97167a3a4c9ed<br />
** File Size: 32.67.00GB<br />
<br />
<br />
<br />
== Android SDK ==<br />
<br />
=== Android 11 SDK for Quartz64 model A SBC ===<br />
* [http://files.pine64.org/SDK/Quartz64/QUARTZ64_SDK_android11.tar.gz Direct Download from pine64.org]<br />
** MD5 (TAR-GZip file): 77c2ff57ea3372fb04da7fb49e17d12b<br />
** File Size: 79.00GB<br />
** Just the boot blobs (<1MB): [[File:Rk35-blobs.tar.gz]]<br />
<br />
<br />
== Other Resources ==<br />
<br />
[[Category:SOQuartz]] [[Category:Quartz64]]</div>
Jeffalyanak
https://wiki.pine64.org/index.php?title=SOQuartz&diff=15202
SOQuartz
2022-12-16T15:45:57Z
<p>Jeffalyanak: /* SOQuartz BLADE Baseboard Features */</p>
<hr />
<div>[[File:SOQuartz module-1s.jpg|400px|thumb|right|The SOQuartz]]<br />
<br />
The '''SOQuartz''' is a RK3566 based compute module and parts of Quartz64 series. <br />
<br />
== Software releases ==<br />
<br />
The SOQuartz software releases can be found in the article [[SOQuartz Software Releases]].<br />
<br />
== SoC and Memory Specification ==<br />
* Based on [https://www.rock-chips.com/a/en/products/RK35_Series/2021/0113/1274.html Rockchip RK3566]<br />
[[File:RK3566_icon.png|right]]<br />
<br />
=== CPU Architecture ===<br />
* [https://developer.arm.com/ip-products/processors/cortex-a/cortex-a55 Quad-core ARM Cortex-A55@1.8GHz]<br />
* AArch32 for full backwards compatibility with ARMv7<br />
* ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation<br />
* Includes VFP hardware to support single and double-precision operations<br />
* ARMv8 Cryptography Extensions<br />
* Integrated 32KB L1 instruction cache and 32KB L1 data cache per core<br />
* 512KB unified system L3 cache<br />
<br />
=== GPU (Graphics Processing Unit) Capabilities ===<br />
* [https://developer.arm.com/ip-products/graphics-and-multimedia/mali-gpus/mali-g52-gpu Mali-G52 2EE Bifrost GPU@800MHz]<br />
* 4x Multi-Sampling Anti-Aliasing (MSAA) with minimal performance drop <br />
* 128KB L2 Cache configurations<br />
* Supports OpenGL ES 1.1, 2.0, and 3.2<br />
* Supports Vulkan 1.0 and 1.1<br />
* Supports OpenCL 2.0 Full Profile<br />
* Supports 1600 Mpix/s fill rate when at 800MHz clock frequency<br />
* Supports 38.4 GLOP/s when at 800MHz clock frequency<br />
<br />
=== Neural Process Unit NPU Capability ===<br />
* Neural network acceleration engine with processing performance of up to 0.8 TOPS<br />
* Supports integer 8 and integer 16 convolution operations<br />
* Supports the following deep learning frameworks: TensorFlow, TF-lite, Pytorch, Caffe, ONNX, MXNet, Keras, Darknet<br />
<br />
=== System Memory ===<br />
* RAM Memory Variants: 2GB, 4GB, 8GB LPDDR4.<br />
* Storage Memory: optional 128Mb SPI Flash and optional eMMC module from 16GB up to 128GB<br />
<br />
=== Network ===<br />
* 10/100/1000Mbps Ethernet<br />
* WiFi 802.11 b/g/n/ac with Bluetooth 5.0<br />
<br />
== SOQuartz exposed peripherals ==<br />
<br />
=== Displays / Cameras ===<br />
<br />
* 1x HDMI<br />
* 2x DSI<br />
* 1x eDP (Instead of HDMI1)<br />
* 1x LVDS (not available when dual-mode DSI)<br />
* 1x CSI 4-line<br />
<br />
=== Connectivity ===<br />
<br />
* 1x Ethernet (1Gbit)<br />
* 1x USB 2.0 OTG<br />
* 1x SD Card (SD)<br />
* 1x PCIe 1-Line<br />
* 28x GPIO (TBD)<br />
<br />
== Connector Pins Definition ==<br />
* [https://files.pine64.org/doc/quartz64/SOQuartz%20Connector%20Pin%20Assignments%20ver%201.0.ods SOQuartz Module Connector Pins Definition ver 1.0]<br />
<br />
<br />
<br />
== SOQuartz Model-A Baseboard Features ==<br />
<br />
[[File:SOQuartz_model-A_baseboard.jpg |400px|thumb|SOQuartz Model-A Baseboard]]<br />
* Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm<br />
* Input Power: DC 12V @ 3A 5.5OD/2.1ID (IEC 60130-10 Type A) Barrel DC Jack connector<br />
<br />
=== Storage ===<br />
* microSD - bootable, support SDHC and SDXC, storage up to 2TB<br />
* USB - 2 USB2.0 Host port<br />
<br />
=== Expansion Ports ===<br />
* MiPi-CSI - 1x 2 lanes, 1x 4 lanes <br />
* MiPi-DSI - 1x 2 lanes, 1x 4 lanes <br />
* 2x20 pins "Pi2" GPIO Header<br />
* PCIe 1x open ended slot<br />
<br />
== SOQuartz BLADE Baseboard Features ==<br />
<br />
[[File:SOQuartz_BLADE_Dimension.jpg |400px|thumb|SOQuartz BLADE Baseboard]]<br />
* SOQuartz BLADE Baseboard Dimensions: 200mm x 40mm x 15mm<br />
* Input Power:<br />
** DC 12V @ 3A 3.4OD/1.3ID (IEC 60130-10 Type E) Barrel DC Jack connector<br />
** PoE<br />
<br />
=== Storage ===<br />
* microSD - bootable, support SDHC and SDXC, storage up to 2TB<br />
* USB - USB2.0 Host port (with header for setting OTG ID pin)<br />
<br />
=== Expansion Ports ===<br />
* 2x20 pins "Pi2" GPIO Header<br />
* M.2 slot<br />
* PWM fan header<br />
<br />
=== Jumpers ===<br />
* OTG ID jumper<br />
* GPIO voltage selection<br />
** 3.3<br />
** 1.8<br />
* PoE Enable<br />
<br />
== SOQuartz Module and Baseboard Information, Schematics, and Certifications ==<br />
<br />
* SOQuartz Module Schematic:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz_SOM_schematic_v1.1_20210816.pdf SOQuartz Module ver 1.1 20210816 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-PCB-placement-v1.1.pdf SOQuartz Module ver 1.1 20210816 PCB Component Placement]<br />
<br />
* SOQuartz Model "A" Baseboard Schematic and PCB Board Resource:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-Model-A-Baseboard-Schematic-20220522.pdf SOQuartz Model-A baseboard 20220522 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-Model-A-Baseboard-Component-Placement_top-20220522.pdf SOQuartz SOQuartz Model-A baseboard 20220522 PCB Top Component Placement]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz_Model_A_Baseboard_Component_Placement_bottom_20220522.pdf SOQuartz SOQuartz Model-A baseboard 20220522 PCB Bottom Component Placement]<br />
<br />
<br />
[[File:BLADE_1U_half_width_server_rack.jpg |400px|thumb|SOQuartz BLADE 3D Print 1U half width server rack]]<br />
[[File:BLADE_1U_full_width_server_rack.jpg |400px|thumb|SOQuartz BLADE 3D Print 1U full width server rack]]<br />
* SOQuartz Blade Baseboard Schematic and PCB Board Resource:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-BLADE-Baseboard-Schematic-20220522.pdf SOQuartz BLADE 20220522 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-BLADE-PCB-Placement-20220522.pdf SOQuartz BLADE 20220522 PCB component Placement]<br />
** [https://files.pine64.org/doc/quartz64/BLADE%201U%20Rack_3D.stp SOQuartz BLADE 1U Rack STP file]<br />
[[File:BLADE_1U_rack_3D.jpg |400px]]<br />
<br />
== Datasheets for Components and Peripherals ==<br />
* Rockchip RK3566 SoC information:<br />
** [https://files.pine64.org/doc/quartz64/Rockchip%20RK3566%20Datasheet%20V1.0-20201210.pdf Rockchip RK3566 ver 1.0 datasheet, already got release permission from Rockchip]<br />
* Rockchip PMU (Power Management Unit) Information:<br />
** [https://www.rockchip.fr/RK809%20datasheet%20V1.01.pdf Rockchip RK809 ver 1.01 datasheet for SOQuartz PMU]<br />
* DDR4 information:<br />
** [https://files.pine64.org/doc/datasheet/rockpro64/SM512M32Z01MD2BNP(200BALL).pdf Micron LPDDR4 Mobile LPDDR4 Datasheet]<br />
* eMMC information:<br />
** [https://files.pine64.org/doc/rock64/PINE64_eMMC_Module_20170719.pdf PINE64 eMMC module schematic]<br />
** [https://files.pine64.org/doc/rock64/usb%20emmc%20module%20adapter%20v2.pdf PINE64 USB adapter for eMMC module V2 schematic]<br />
** [https://files.pine64.org/doc/rock64/USB%20adapter%20for%20eMMC%20module%20PCB.tar PINE64 USB adapter for eMMC module PCB in JPEG]<br />
** [https://files.pine64.org/doc/datasheet/pine64/E-00517%20FORESEE_eMMC_NCEMAM8B-16G%20SPEC.pdf 16GB Foresee eMMC Datasheet]<br />
** [https://files.pine64.org/doc/datasheet/pine64/SDINADF4-16-128GB-H%20data%20sheet%20v1.13.pdf 32GB/64GB/128GB SanDisk eMMC Datasheet]<br />
* SPI NOR Flash information:<br />
* Ethernet PHY information:<br />
** [https://files.pine64.org/doc/datasheet/pine64/rtl8211e(g)-vb(vl)-cg_datasheet_1.6.pdf Realtek RTL8211 10/100/1000M Ethernet Transceiver]<br />
* WiFi/BT module info:<br />
** [https://files.pine64.org/doc/datasheet/rockpro64/AW-CM256SM_DS_DF_V1.9_STD.pdf Azurewave CM256SM 11AC WiFi + Bluetooth5.0 Datasheet]<br />
* i2C to PWM Controller user in BLADE info:<br />
** [https://files.pine64.org/doc/datasheet/quartz64/GP7101_cn_V1_qsxn.pdf GP7101 i2c to PWM Controller Datasheet in Chinese]<br />
** GP7101 i2c to PWM Controller Datasheet translated to English by neggles [[File:GP7101 cn V1 qsxn en.pdf]]<br />
* PoE DC/DC Controller user in BLADE info:<br />
** [https://files.pine64.org/doc/datasheet/quartz64/SD4954B%20Datasheet.pdf Silan SD4954B PD and DC/DC Controller compatible with IEEE 802.3AF standard Datasheet]<br />
<br />
== SOQuartz Module with various CM4 carrier boards ==<br />
<br />
* For CM4 carrier board comprehensive list, please visit [https://pipci.jeffgeerling.com/boards_cm Jeff Geerling collection]<br />
<br />
[[File:SOQuartz_with_DF_Robot_carrier_board.jpg|400px|thumb|SOQuartz with DF Robot CM4 Carrier Board]]<br />
<br />
[[File:SOQuartz_with_Waveshare_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 Carrier Board]]<br />
<br />
[[File:SOQuartz_with_Waveshare_PoE_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 PoE Board]]<br />
<br />
<br />
<br />
== BSP Linux SDK ==<br />
<br />
=== BSP Linux SDK ver 4.19 for Quartz64 model A SBC ===<br />
* [http://files.pine64.org/SDK/Quartz64/QUARTZ64-model-A_BSP%20Linux.tar.gz Direct Download from pine64.org]<br />
** MD5 (TAR-GZip file): 24554419aec29700add97167a3a4c9ed<br />
** File Size: 32.67.00GB<br />
<br />
<br />
<br />
== Android SDK ==<br />
<br />
=== Android 11 SDK for Quartz64 model A SBC ===<br />
* [http://files.pine64.org/SDK/Quartz64/QUARTZ64_SDK_android11.tar.gz Direct Download from pine64.org]<br />
** MD5 (TAR-GZip file): 77c2ff57ea3372fb04da7fb49e17d12b<br />
** File Size: 79.00GB<br />
** Just the boot blobs (<1MB): [[File:Rk35-blobs.tar.gz]]<br />
<br />
<br />
== Other Resources ==<br />
<br />
[[Category:SOQuartz]] [[Category:Quartz64]]</div>
Jeffalyanak
https://wiki.pine64.org/index.php?title=SOQuartz&diff=15201
SOQuartz
2022-12-16T15:44:12Z
<p>Jeffalyanak: Added details for SOQuartz BLADE Baseboard Features section</p>
<hr />
<div>[[File:SOQuartz module-1s.jpg|400px|thumb|right|The SOQuartz]]<br />
<br />
The '''SOQuartz''' is a RK3566 based compute module and parts of Quartz64 series. <br />
<br />
== Software releases ==<br />
<br />
The SOQuartz software releases can be found in the article [[SOQuartz Software Releases]].<br />
<br />
== SoC and Memory Specification ==<br />
* Based on [https://www.rock-chips.com/a/en/products/RK35_Series/2021/0113/1274.html Rockchip RK3566]<br />
[[File:RK3566_icon.png|right]]<br />
<br />
=== CPU Architecture ===<br />
* [https://developer.arm.com/ip-products/processors/cortex-a/cortex-a55 Quad-core ARM Cortex-A55@1.8GHz]<br />
* AArch32 for full backwards compatibility with ARMv7<br />
* ARM Neon Advanced SIMD (single instruction, multiple data) support for accelerated media and signal processing computation<br />
* Includes VFP hardware to support single and double-precision operations<br />
* ARMv8 Cryptography Extensions<br />
* Integrated 32KB L1 instruction cache and 32KB L1 data cache per core<br />
* 512KB unified system L3 cache<br />
<br />
=== GPU (Graphics Processing Unit) Capabilities ===<br />
* [https://developer.arm.com/ip-products/graphics-and-multimedia/mali-gpus/mali-g52-gpu Mali-G52 2EE Bifrost GPU@800MHz]<br />
* 4x Multi-Sampling Anti-Aliasing (MSAA) with minimal performance drop <br />
* 128KB L2 Cache configurations<br />
* Supports OpenGL ES 1.1, 2.0, and 3.2<br />
* Supports Vulkan 1.0 and 1.1<br />
* Supports OpenCL 2.0 Full Profile<br />
* Supports 1600 Mpix/s fill rate when at 800MHz clock frequency<br />
* Supports 38.4 GLOP/s when at 800MHz clock frequency<br />
<br />
=== Neural Process Unit NPU Capability ===<br />
* Neural network acceleration engine with processing performance of up to 0.8 TOPS<br />
* Supports integer 8 and integer 16 convolution operations<br />
* Supports the following deep learning frameworks: TensorFlow, TF-lite, Pytorch, Caffe, ONNX, MXNet, Keras, Darknet<br />
<br />
=== System Memory ===<br />
* RAM Memory Variants: 2GB, 4GB, 8GB LPDDR4.<br />
* Storage Memory: optional 128Mb SPI Flash and optional eMMC module from 16GB up to 128GB<br />
<br />
=== Network ===<br />
* 10/100/1000Mbps Ethernet<br />
* WiFi 802.11 b/g/n/ac with Bluetooth 5.0<br />
<br />
== SOQuartz exposed peripherals ==<br />
<br />
=== Displays / Cameras ===<br />
<br />
* 1x HDMI<br />
* 2x DSI<br />
* 1x eDP (Instead of HDMI1)<br />
* 1x LVDS (not available when dual-mode DSI)<br />
* 1x CSI 4-line<br />
<br />
=== Connectivity ===<br />
<br />
* 1x Ethernet (1Gbit)<br />
* 1x USB 2.0 OTG<br />
* 1x SD Card (SD)<br />
* 1x PCIe 1-Line<br />
* 28x GPIO (TBD)<br />
<br />
== Connector Pins Definition ==<br />
* [https://files.pine64.org/doc/quartz64/SOQuartz%20Connector%20Pin%20Assignments%20ver%201.0.ods SOQuartz Module Connector Pins Definition ver 1.0]<br />
<br />
<br />
<br />
== SOQuartz Model-A Baseboard Features ==<br />
<br />
[[File:SOQuartz_model-A_baseboard.jpg |400px|thumb|SOQuartz Model-A Baseboard]]<br />
* Model "A" Baseboard Dimensions: 133mm x 80mm x 19mm<br />
* Input Power: DC 12V @ 3A 5.5OD/2.1ID (IEC 60130-10 Type A) Barrel DC Jack connector<br />
<br />
=== Storage ===<br />
* microSD - bootable, support SDHC and SDXC, storage up to 2TB<br />
* USB - 2 USB2.0 Host port<br />
<br />
=== Expansion Ports ===<br />
* MiPi-CSI - 1x 2 lanes, 1x 4 lanes <br />
* MiPi-DSI - 1x 2 lanes, 1x 4 lanes <br />
* 2x20 pins "Pi2" GPIO Header<br />
* PCIe 1x open ended slot<br />
<br />
== SOQuartz BLADE Baseboard Features ==<br />
<br />
[[File:SOQuartz_BLADE_Dimension.jpg |400px|thumb|SOQuartz BLADE Baseboard]]<br />
* SOQuartz BLADE Baseboard Dimensions: 200mm x 40mm x 15mm<br />
* Input Power:<br />
** DC 12V @ 3A 3.4OD/1.3ID (IEC 60130-10 Type E) Barrel DC Jack connector<br />
** PoE<br />
<br />
=== Storage ===<br />
* microSD - bootable, support SDHC and SDXC, storage up to 2TB<br />
* USB - USB2.0 Host port (with header for setting OTG ID pin)<br />
<br />
=== Expansion Ports ===<br />
* 2x20 pins "Pi2" GPIO Header<br />
* M.2 slot<br />
* PWM fan header<br />
<br />
== SOQuartz Module and Baseboard Information, Schematics, and Certifications ==<br />
<br />
* SOQuartz Module Schematic:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz_SOM_schematic_v1.1_20210816.pdf SOQuartz Module ver 1.1 20210816 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-PCB-placement-v1.1.pdf SOQuartz Module ver 1.1 20210816 PCB Component Placement]<br />
<br />
* SOQuartz Model "A" Baseboard Schematic and PCB Board Resource:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-Model-A-Baseboard-Schematic-20220522.pdf SOQuartz Model-A baseboard 20220522 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-Model-A-Baseboard-Component-Placement_top-20220522.pdf SOQuartz SOQuartz Model-A baseboard 20220522 PCB Top Component Placement]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz_Model_A_Baseboard_Component_Placement_bottom_20220522.pdf SOQuartz SOQuartz Model-A baseboard 20220522 PCB Bottom Component Placement]<br />
<br />
<br />
[[File:BLADE_1U_half_width_server_rack.jpg |400px|thumb|SOQuartz BLADE 3D Print 1U half width server rack]]<br />
[[File:BLADE_1U_full_width_server_rack.jpg |400px|thumb|SOQuartz BLADE 3D Print 1U full width server rack]]<br />
* SOQuartz Blade Baseboard Schematic and PCB Board Resource:<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-BLADE-Baseboard-Schematic-20220522.pdf SOQuartz BLADE 20220522 Schematic]<br />
** [https://files.pine64.org/doc/quartz64/SOQuartz-BLADE-PCB-Placement-20220522.pdf SOQuartz BLADE 20220522 PCB component Placement]<br />
** [https://files.pine64.org/doc/quartz64/BLADE%201U%20Rack_3D.stp SOQuartz BLADE 1U Rack STP file]<br />
[[File:BLADE_1U_rack_3D.jpg |400px]]<br />
<br />
== Datasheets for Components and Peripherals ==<br />
* Rockchip RK3566 SoC information:<br />
** [https://files.pine64.org/doc/quartz64/Rockchip%20RK3566%20Datasheet%20V1.0-20201210.pdf Rockchip RK3566 ver 1.0 datasheet, already got release permission from Rockchip]<br />
* Rockchip PMU (Power Management Unit) Information:<br />
** [https://www.rockchip.fr/RK809%20datasheet%20V1.01.pdf Rockchip RK809 ver 1.01 datasheet for SOQuartz PMU]<br />
* DDR4 information:<br />
** [https://files.pine64.org/doc/datasheet/rockpro64/SM512M32Z01MD2BNP(200BALL).pdf Micron LPDDR4 Mobile LPDDR4 Datasheet]<br />
* eMMC information:<br />
** [https://files.pine64.org/doc/rock64/PINE64_eMMC_Module_20170719.pdf PINE64 eMMC module schematic]<br />
** [https://files.pine64.org/doc/rock64/usb%20emmc%20module%20adapter%20v2.pdf PINE64 USB adapter for eMMC module V2 schematic]<br />
** [https://files.pine64.org/doc/rock64/USB%20adapter%20for%20eMMC%20module%20PCB.tar PINE64 USB adapter for eMMC module PCB in JPEG]<br />
** [https://files.pine64.org/doc/datasheet/pine64/E-00517%20FORESEE_eMMC_NCEMAM8B-16G%20SPEC.pdf 16GB Foresee eMMC Datasheet]<br />
** [https://files.pine64.org/doc/datasheet/pine64/SDINADF4-16-128GB-H%20data%20sheet%20v1.13.pdf 32GB/64GB/128GB SanDisk eMMC Datasheet]<br />
* SPI NOR Flash information:<br />
* Ethernet PHY information:<br />
** [https://files.pine64.org/doc/datasheet/pine64/rtl8211e(g)-vb(vl)-cg_datasheet_1.6.pdf Realtek RTL8211 10/100/1000M Ethernet Transceiver]<br />
* WiFi/BT module info:<br />
** [https://files.pine64.org/doc/datasheet/rockpro64/AW-CM256SM_DS_DF_V1.9_STD.pdf Azurewave CM256SM 11AC WiFi + Bluetooth5.0 Datasheet]<br />
* i2C to PWM Controller user in BLADE info:<br />
** [https://files.pine64.org/doc/datasheet/quartz64/GP7101_cn_V1_qsxn.pdf GP7101 i2c to PWM Controller Datasheet in Chinese]<br />
** GP7101 i2c to PWM Controller Datasheet translated to English by neggles [[File:GP7101 cn V1 qsxn en.pdf]]<br />
* PoE DC/DC Controller user in BLADE info:<br />
** [https://files.pine64.org/doc/datasheet/quartz64/SD4954B%20Datasheet.pdf Silan SD4954B PD and DC/DC Controller compatible with IEEE 802.3AF standard Datasheet]<br />
<br />
== SOQuartz Module with various CM4 carrier boards ==<br />
<br />
* For CM4 carrier board comprehensive list, please visit [https://pipci.jeffgeerling.com/boards_cm Jeff Geerling collection]<br />
<br />
[[File:SOQuartz_with_DF_Robot_carrier_board.jpg|400px|thumb|SOQuartz with DF Robot CM4 Carrier Board]]<br />
<br />
[[File:SOQuartz_with_Waveshare_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 Carrier Board]]<br />
<br />
[[File:SOQuartz_with_Waveshare_PoE_carrier_board.jpg|400px|thumb|SOQuartz with Waveshare CM4 PoE Board]]<br />
<br />
<br />
<br />
== BSP Linux SDK ==<br />
<br />
=== BSP Linux SDK ver 4.19 for Quartz64 model A SBC ===<br />
* [http://files.pine64.org/SDK/Quartz64/QUARTZ64-model-A_BSP%20Linux.tar.gz Direct Download from pine64.org]<br />
** MD5 (TAR-GZip file): 24554419aec29700add97167a3a4c9ed<br />
** File Size: 32.67.00GB<br />
<br />
<br />
<br />
== Android SDK ==<br />
<br />
=== Android 11 SDK for Quartz64 model A SBC ===<br />
* [http://files.pine64.org/SDK/Quartz64/QUARTZ64_SDK_android11.tar.gz Direct Download from pine64.org]<br />
** MD5 (TAR-GZip file): 77c2ff57ea3372fb04da7fb49e17d12b<br />
** File Size: 79.00GB<br />
** Just the boot blobs (<1MB): [[File:Rk35-blobs.tar.gz]]<br />
<br />
<br />
== Other Resources ==<br />
<br />
[[Category:SOQuartz]] [[Category:Quartz64]]</div>
Jeffalyanak
https://wiki.pine64.org/index.php?title=PineCone&diff=9065
PineCone
2021-01-23T20:15:01Z
<p>Jeffalyanak: /* Pinenut-01S Module information and schematics */</p>
<hr />
<div>{{Note|Page under construction, information subject to change.}}<br />
<br />
* PineCone BL-602 EVB (Evaluation Board):<br />
<br />
[[File:Pine64_BL602_EVB_photo-3-small.jpg|400px]]<br />
<br />
== BL602 Specifications ==<br />
* '''CPU:''' 32-bit RV32IMAFC RISC-V “SiFive E24 Core”<br />
** [https://www.sifive.com/cores/e24 SiFive E24 Core information]<br />
* '''Memory:'''<br />
** 128KB ROM<br />
** 276KB SRAM<br />
** 1Kb eFuse<br />
** 2MB Embedded Flash<br />
* '''Security:'''<br />
** Secure boot<br />
** Secure debug<br />
** AES 128/192/256<br />
** SHA-1/224/256<br />
** TRNG (True Random Number Generator)<br />
** PKA (Public Key Accelerator)<br />
* '''Wireless:'''<br />
** Wi-Fi 802.11 b/g/n<br />
** Bluetooth® Low Energy 5.0<br />
** Wi-Fi Fast connection with BLE assistance<br />
** Wi-Fi and BLE coexistence<br />
** Wi-Fi Security WPS/WEP/WPA/WPA2/WPA3<br />
** STA, SoftAP and sniffer modes<br />
** Multi-Cloud connectivity<br />
** 2.4 GHz RF transceiver<br />
** Integrated RF balun, PA/LNA<br />
* '''Package Type:'''<br />
** 32 pin QFN 4mm x 4mm<br />
* JTAG support (See below for BL602 impact)<br />
<br />
[[File:BL602_Block_Diagram.jpg|600px]]<br />
<br />
== JTAG ==<br />
{| class="wikitable floatright"<br />
|+ Default JTAG pins<br />
|-<br />
| GPIO Pin || JTAG Pin<br />
|-<br />
| GPIO17 || TDI<br />
|-<br />
| GPIO11 || TDO<br />
|-<br />
| GPIO12 || TMS<br />
|-<br />
| GPIO14 || TCK<br />
|-<br />
|}<br />
<br />
BL602 multiplexes four GPIO pins to provide the familiar JTAG lines. See the accompanying table for the default pin mappings.<br />
<br />
These are the default JTAG pins in use after a cold boot. However, many pieces of software, including the demo that's installed by default on new PineCones, remap these pins to other functions. You cannot use the default wiring for JTAG while such software is running. This issue is especially prevalent on the PineCone because three of the default JTAG pins are connected to the onboard RGB LED. Nothing about the LED itself interferes with JTAG, but any program that uses the LED will necessarily remap some of the default JTAG pins to be GPIO.<br />
<br />
The MaskROM download mode that the BL602 enters when you tie GPIO8 high does '''not''' remap the default JTAG pins, and so you can and should use that mode while checking basic functionality of your JTAG adapter.<br />
<br />
Note that, just as software can remap the default JTAG pins to be something else, it can also remap other pins to be JTAG. Control over this is quite granular, with 5-6 candidate pins for each individual JTAG signal that can be mapped independently of one another. LEE Lup Yuen has written some [https://lupyuen.github.io/articles/openocd#free-the-led-from-jtag-port sample code] showing how to remap the JTAG pins so that your software can use the LED without giving up support for debugging.<br />
<br />
== Pine64 USB JTAG Adapter information and schematics ==<br />
* [https://files.pine64.org/doc/Pinenut/PINE64%20USB%20JTAG%20Adapter%20Schematic-20201215.pdf PINE64 USB JTAG Adapter schematic 20202018 1.0]<br />
* [[:File:PINE64_USB_JTAG_Adapter_Schematic_ver_1.0a-20210109.pdf|PINE64 USB JTAG Adapter schematic 20210109 1.0a]]<br />
<br />
== PineCone BL602 EVB information and schematics ==<br />
* Approximate dimensions: 26mm x 43mm<br />
* Board layout:<br />
[[File:PADI-II_EVB.png]]<br />
* [https://files.pine64.org/doc/Pinenut/Pine64%20BL602%20EVB%20Schematic%20ver%201.1.pdf PineCone BL602 EVB schematic ver 1.1]<br />
** Note: In PineCone revision 1.1 ("BL62B_EVB V1.1" silkscreened on back of board), CC1 and CC2 share one 5.1KΩ resistor. This means the board will fail to power when you use an e-marked USB-C cable like the one that comes with Apple chargers. See [https://medium.com/@leung.benson/how-to-design-a-proper-usb-c-power-sink-hint-not-the-way-raspberry-pi-4-did-it-f470d7a5910 this article] for details of why this happens. The next schematic design will give each line its own 5.1KΩ resistor as per the USB-C specification.<br />
* The board uses a CH340 Serial/USB adapter. This chip is commonly used in Arduino-class development boards. It is a full speed (12Mbps) USB interface and has vendor ID 0x1a86 with product ID 0x7523.<br />
* The GPIO pins (11, 12, 14, 17) plus the nearby RESET, POWER, and GND pins are all located on one side of the board, on J1 to provide JTAG connection.<br />
<br />
== Pinenut-01S Module information and schematics ==<br />
[[File:Pinenut-01S_PCB-Front.png|225px]][[File:Pinenut-01S_PCB-Back.png|225px]]<br />
* [https://files.pine64.org/doc/Pinenut/Pinenut-01S%20V1.01%20SCH.pdf Pinenut-01S schematic ver 1.01]<br />
* [https://wiki.pine64.org/images/6/6b/PineNut-01S_v1.01_KiCad.zip PineNut-01S KiCad schematic ver 1.01]<br />
* [https://files.pine64.org/doc/Pinenut/NUT-01S%20GPIO%20Definition%20ver%201.0.pdf Pinenut-01S GPIO Definition ver 1.0]<br />
* [https://files.pine64.org/doc/Pinenut/USB%20Adapter%20for%20Pinenut-01S%20Schematic%20V1.0.pdf USB Programmer adapter for Pinenut-01S schematic ver 1.0]<br />
<br />
== Pinenut-12S Module information ==<br />
[[File:NUT-12S_module-front.jpg|200px]][[File:NUT-12S_module-back.jpg|200px]]<br />
* [https://files.pine64.org/doc/Pinenut/NUT-12S%20GPIO%20Definition%20ver%201.0.pdf Pinenut-12S GPIO Definition ver 1.0]<br />
<br />
<br />
== Datasheets for components and peripherals ==<br />
* Bouffalo BL-602 SoC information:<br />
** [https://github.com/bouffalolab/bl_docs Bouffalo Lab's official bl_docs repository]: should always contain the latest SoC documentation available, in PDF, HTML, and reStructuredText source forms.<br />
** [https://github.com/pine64/bl602-docs/tree/main/mirrored PINE64's bl602-docs repository]: contains an archive of all historical datasheets and reference manual PDFs but may lag behind Bouffalo's official repository. If you notice that it is, please submit a pull request!<br />
* USB/Serial adapter:<br />
** [https://cdn.sparkfun.com/datasheets/Dev/Arduino/Other/CH340DS1.PDF CH340 serial converter]<br />
<br />
== Misc notes ==<br />
Planned to be available in at least three form factors:<br />
* NUT-01S -> ESP-01S<br />
* NUT-12S -> ESP-12S<br />
* NUT-15 -> RTL8723/AMPAK<br />
<br />
== Loading code ==<br />
To load code, you must move the jumper to the edge closest to the board, press reset, load the code, move the jumper back toward the center of the board, and press reset again.<br />
<br />
There are currently a number of loaders in progress, each with differing degrees of completeness and success on various operating systems.<br />
* In the build tree, there is BLFlashCube for Windows, which is a proprietary GUI for flashing images. Linux and macOS binaries are available via [https://dev.bouffalolab.com/download Bouffalo Lab's developer portal].<br />
* [https://github.com/stschake/bl60x-flash bl60x-flash] is in Python and has been reported successful on MacOS catalina (10.15.6) by Punnerud and madushan1000.<br />
* [https://github.com/bouffalolab/BLOpenFlasher BLOpenFlasher] is a WIP, written in go, by Bouffalo Labs to provide source for a flash utility.<br />
* [https://github.com/renzenicolai/bl602tool bl602tool] is a Python utility in development.<br />
* [https://pypi.org/project/bflb-eflash-loader/ Bouffalo's Python Flash Loader] is a new (Dec 02) flash loader by the makers of the chip.<br />
* [https://pypi.org/project/bflb-image-build/ Bouffalo's image build] smooshes code and adds headers for downloads.<br />
<br />
== Development efforts ==<br />
* [https://github.com/pine64/bl_iot_sdk PineCone BL602 GitHub Page (PINE64 fork)] has compilers, linkers, and all the code to build on Windows, Linux (x86_64), and MacOS.<br />
* [https://github.com/bouffalolab/bl_iot_sdk Bouffalo Lab GitHub Page]<br />
* [https://github.com/renzenicolai/bl602-docs/ BL602 Developer organize documentation GitHub Page]<br />
* [https://github.com/renzenicolai/bl602tool BL602 Developer organize tool GitHub Page]<br />
* [https://github.com/stschake/bl60x-flash Programming tool for Bouffalo Labs BL602/BL604 chips]<br />
* [https://github.com/pine64/bl602-re BL602 reverse engineering working group]<br />
* [https://github.com/pine64/bl602-sdio-linux Linux kernel module]<br />
* [https://github.com/spacemeowx2/blflash BL602 serial flasher]<br />
* [https://github.com/mkroman/awesome-bouffalo#feature-matrix Awesome Bouffalo]<br />
<br />
== Articles and Blogs ==<br />
* [https://lupyuen.github.io/articles/pinecone Quick Peek of PineCone BL602 RISC-V Evaluation Board by Lup Yuen]<br />
* [https://maero.dk/bl602-firmware-image-format/ Documenting the BouffaloLab BL602 firmware image format by MK]<br />
* [https://lupyuen.github.io/articles/openocd Connect PineCone BL602 to OpenOCD by Lup Yuen]<br />
* [https://lupyuen.github.io/articles/debug Debug Rust on PineCone BL602 with VSCode and GDB by Lup Yuen]<br />
* [https://lupyuen.github.io/articles/mynewt Porting Mynewt to PineCone BL602 by Lup Yuen]<br />
* [https://lupyuen.github.io/articles/flash Flashing Firmware to PineCone BL602 by Lup Yuen]<br />
* [https://lupyuen.github.io/articles/led Control PineCone BL602 RGB LED with GPIO and PWM by Lup Yuen]<br />
* [https://lupyuen.github.io/articles/gpio Mynewt GPIO ported to PineCone BL602 RISC-V Board by Lup Yuen]<br />
<br />
[[Category:Nutcracker]]</div>
Jeffalyanak
https://wiki.pine64.org/index.php?title=File:PineNut-01S_v1.01_KiCad.zip&diff=9064
File:PineNut-01S v1.01 KiCad.zip
2021-01-23T20:13:31Z
<p>Jeffalyanak: Pinenut-01S schematic ver 1.01 in KiCad format</p>
<hr />
<div>== Summary ==<br />
Pinenut-01S schematic ver 1.01 in KiCad format</div>
Jeffalyanak